On Tue, 2021-06-15 at 12:06 +0100, Andre Przywara wrote: > The USB HCIs (and PHYs?) in Allwinner's newer generation SoCs (H616) > rely on the reset line of USB PHY 2 to be de-asserted, even when only > one of the other PHYs is actually in use. > > To make those ports work, we include this reset line in the HCIs' resets > property, which requires this line to be shareable. > > Change the call to allocate the reset line to mark it as shared, to > enable the other ports on those SoCs. > > Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> Reviewed-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> regards Philipp
