Hi, Thinh Nguyen <Thinh.Nguyen@xxxxxxxxxxxx> writes: >>>>> How have you verified this patch? Did you read Bryan's commit log? This >>>>> is likely to reintroduce the problem raised by Bryan. >>>>> >>>> We verified with our FPGA HAPS with various number of endpoints. No >>>> issue is seen. >>> That's cool. Could you please make sure our understanding of this is >>> sound and won't interfere with any designs? If we modify this part of >>> the code again, I'd like to see a clear reference to a specific section >>> of the databook detailing the expected behavior :-) >>> >>> cheers >>> >> Hm... I didn't consider bidirection endpoint other than control endpoint. >> >> DWC3_USB3x_NUM_EPS specifies the number of device mode for single >> directional endpoints. A bidirectional endpoint needs 2 single >> directional endpoints, 1 IN and 1 OUT. So, if your setup uses 3 >> bidirection endpoints and only those, DWC3_USB3x_NUM_EPS should be 6. >> DWC3_USB3x_NUM_IN_EPS specifies the maximum number of IN endpoint active >> at any time. >> >> However, I will have to double check and confirm internally regarding >> how to determine many endpoint would be available if bidirection >> endpoints come into play. >> >> Thanks for pointing this out. Will get back on this. >> >> Thinh >> > > Ok. Just had some discussion internally. So, like you said, any endpoint > can be configured in either direction. However, we are limited to > configuring up to DWC_USB3x_NUM_IN_EPS because each IN endpoint has its > own TxFIFO while for OUT, they share the same RxFIFO. So we could have > up to DWC_USB3x_NUM_EPS number of OUT endpoints. So, the issue Bryan > attempted to address is still there. > > However, the current code still has some assumption on the number of IN > and OUT endpoints, I need to think of a better solution. Yes, the assumption still exists because at the time there was no better solution :-) -- balbi
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