Hi,
Peter Chen <peter.chen@xxxxxxx> writes:
> From: Pawel Laszczak <pawell@xxxxxxxxxxx>
>
> Patch fixes issue caused setting On-chip memory overflow bit in usb_sts
> register. The issue occurred because EP_CFG register was set twice
> before USB_STS.CFGSTS was set. Every write operation on EP_CFG.BUFFERING
> causes that controller increases internal counter holding the number
> of reserved on-chip buffers. First time this register was updated in
> function cdns3_ep_config before delegating SET_CONFIGURATION request
> to class driver and again it was updated when class wanted to enable
> endpoint. This patch fixes this issue by configuring endpoints
> enabled by class driver in cdns3_gadget_ep_enable and others just
> before status stage.
>
> Cc: <stable@xxxxxxxxxxxxxxx> #v5.8+
> Fixes: 7733f6c32e36 ("usb: cdns3: Add Cadence USB3 DRD Driver")
> Reported-and-tested-by: Peter Chen <peter.chen@xxxxxxx>
> Signed-off-by: Pawel Laszczak <pawell@xxxxxxxxxxx>
> Signed-off-by: Peter Chen <peter.chen@xxxxxxx>
This looks very large for a fix, are you sure there isn't a minimal fix
hidden somewhere?
--
balbi
