According to Synopsys Programming Guide chapter 2.2 Register Resets,
it cannot reset the DCTL register by setting DCTL.CSFTRST for core soft
reset, if DWC3 controller as a slave device and stay connected with a usb
host, then, while rebooting linux, it will fail to reinitialize dwc3 as a
slave device when the DWC3 controller did not power off. because the
connection status is incorrect, so we also need to clear DCTL.RUN_STOP
bit for disabling connect when doing core soft reset. There will still
be other stale configuration in DCTL, so reset the other fields of DCTL
to the default value 0.
Fixes: f59dcab176293b6 ("usb: dwc3: core: improve reset sequence")
Suggested-by: Thinh Nguyen <Thinh.Nguyen@xxxxxxxxxxxx>
Signed-off-by: Dejin Zheng <zhengdejin5@xxxxxxxxx>
---
v2 -> v3:
* Reset all fields of DCTL register by Thinh's suggest,
Thanks for Thinh's help!
v1 -> v2:
* modify some commit messages by Sergei's suggest, Thanks
very much for Sergei's help!
drivers/usb/dwc3/core.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 2eb34c8b4065..86375cfd9481 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -254,9 +254,7 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST)
return 0;
- reg = dwc3_readl(dwc->regs, DWC3_DCTL);
- reg |= DWC3_DCTL_CSFTRST;
- dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+ dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST);
/*
* For DWC_usb31 controller 1.90a and later, the DCTL.CSFRST bit
--
2.25.0
