Peter Chen <peter.chen@xxxxxxx> writes:
> - Judge each TRB has been handled at cdns3_trb_handled, since
> the DMA pointer may be at the middle of the TD, we can't consider
> this TD has finished at that time.
> - Calcuate req->actual according to finished TRBs.
^^^^^^^^
calculate
> - Handle short transfer for sg list use case correctly. When the
> short transfer occurs, we check OUT_SMM at TRB to see if it is
> the last TRB.
it looks like each of these should be split to its own patch.
> Signed-off-by: Peter Chen <peter.chen@xxxxxxx>
> ---
> drivers/usb/cdns3/gadget.c | 85 +++++++++++++++++++++++++-------------
> drivers/usb/cdns3/gadget.h | 9 ++++
> 2 files changed, 65 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c
> index a308a694abc5..6cb44c354f40 100644
> --- a/drivers/usb/cdns3/gadget.c
> +++ b/drivers/usb/cdns3/gadget.c
> @@ -817,6 +817,8 @@ void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
> request->length);
>
> priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
> + /* All TRBs have finished, clear the counter */
> + priv_req->finished_trb = 0;
> trace_cdns3_gadget_giveback(priv_req);
>
> if (priv_dev->dev_ver < DEV_VER_V2) {
> @@ -1241,6 +1243,7 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
> trb = priv_req->trb;
>
> priv_req->flags |= REQUEST_PENDING;
> + priv_req->num_of_trb = num_trb;
>
> if (sg_iter == 1)
> trb->control |= cpu_to_le32(TRB_IOC | TRB_ISP);
> @@ -1362,7 +1365,7 @@ void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
> }
>
> /**
> - * cdns3_request_handled - check whether request has been handled by DMA
> + * cdns3_trb_handled - check whether trb has been handled by DMA
> *
> * @priv_ep: extended endpoint object.
> * @priv_req: request object for checking
> @@ -1379,32 +1382,28 @@ void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
> * ET = priv_req->end_trb - index of last TRB in transfer ring
> * CI = current_index - index of processed TRB by DMA.
> *
> - * As first step, function checks if cycle bit for priv_req->start_trb is
> - * correct.
> + * As first step, we check if the TRB between the ST and ET.
> + * Then, we check if cycle bit for index priv_ep->dequeue
> + * is correct.
> *
> * some rules:
> - * 1. priv_ep->dequeue never exceed current_index.
> + * 1. priv_ep->dequeue never equals to current_index.
> * 2 priv_ep->enqueue never exceed priv_ep->dequeue
> * 3. exception: priv_ep->enqueue == priv_ep->dequeue
> * and priv_ep->free_trbs is zero.
> * This case indicate that TR is full.
> *
> - * Then We can split recognition into two parts:
> + * At below two cases, the request have been handled.
> * Case 1 - priv_ep->dequeue < current_index
> * SR ... EQ ... DQ ... CI ... ER
> * SR ... DQ ... CI ... EQ ... ER
> *
> - * Request has been handled by DMA if ST and ET is between DQ and CI.
> - *
> * Case 2 - priv_ep->dequeue > current_index
> - * This situation take place when CI go through the LINK TRB at the end of
> + * This situation takes place when CI go through the LINK TRB at the end of
not part of $subject
--
balbi
Attachment:
signature.asc
Description: PGP signature
