2009/7/13 Daniel Mack <daniel@xxxxxxxx>:
> On Mon, Jul 13, 2009 at 05:52:43PM +0200, javier Martin wrote:
>> Sorry for breaking thread but I missed the main one.
>>
>> I am testing last version of Daniel Mack's patches in a i.mx27 based
>> board and I am getting the error in the attached file.
>> For some reason (probably a mistake of mine in platform code) USB
>> transceiver is not being detected through ULPI
>> interface, however, the driver continues registering EHCI untill it crashes.
>>
>> Shouldn't be cleaner to unregister what has been registered and abort
>> driver execution?
>
> Well, we should probably, but there is broken boards - at least I
> suspect mine to have a problem there which nobody else was to reproduce
> with the same software stack. And these boards will still work fine even
> if this part of initialization fails. Hence I didn't make that a hard
> error.
>
>> The system should be able to start although there is an error with the
>> transceiver.
>
> True, and the error you're seeing does not to be related to direct ULPI
> communication but occurs at some later point. Could you put some
> printk()s in the ehci driver part and see where exactly it crashes? The
> logs won't currently show that. Also, posting your board-specific
> platform data would help.
>
> But I've never ran into a "Unhandled fault: external abort on
> non-linefetch (0x808) at 0xc4846184". Maybe anyone else can explain
> that?
>
> Daniel
>
Well, I am using gdb for debugging the kernel through JTAG,
it currently crashes in function "static int __init ehci_hcd_init(void)"
when executing line "retval = platform_driver_register(&PLATFORM_DRIVER);".
Here is the i.MX27 specific stuff I added apart from your patches:
---
From: Javier Martin <javier.martin@xxxxxxxxxxxxxxxxx>
Signed-off-by:
---
diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig
index e8d021c..fb00700 100644
--- a/arch/arm/mach-mx2/Kconfig
+++ b/arch/arm/mach-mx2/Kconfig
@@ -51,6 +51,7 @@ endchoice
config MACH_IMX27_VISSTRIM_M10
bool "Vista Silicon Visstrim_M10 board"
depends on MACH_MX27
+ select MXC_ULPI
help
Include support for Vista Silicon Visstrim_M10 platform. This
includes specific configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 2c97144..e8d33a6 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -643,7 +643,14 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "cspi3", cspi3_clk)
_REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
_REGISTER_CLOCK(NULL, "csi", csi_clk)
- _REGISTER_CLOCK(NULL, "usb", usb_clk)
+ _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk)
+ _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk1)
+ _REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk)
+ _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", usb_clk1)
+ _REGISTER_CLOCK("mxc-ehci.1", "usb", usb_clk)
+ _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", usb_clk1)
+ _REGISTER_CLOCK("mxc-ehci.2", "usb", usb_clk)
+ _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_clk1)
_REGISTER_CLOCK(NULL, "ssi1", ssi1_clk)
_REGISTER_CLOCK(NULL, "ssi2", ssi2_clk)
_REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c
index a0f1b36..4e7feea 100644
--- a/arch/arm/mach-mx2/devices.c
+++ b/arch/arm/mach-mx2/devices.c
@@ -407,6 +407,98 @@ struct platform_device mxc_sdhc_device1 = {
.resource = mxc_sdhc2_resources,
};
+static struct resource otg_resources[] = {
+ {
+ .start = OTG_BASE_ADDR,
+ .end = OTG_BASE_ADDR + 0x1ff,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = MXC_INT_USB3,
+ .end = MXC_INT_USB3,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 otg_dmamask = 0xffffffffUL;
+
+/* OTG gadget device */
+struct platform_device mxc_otg_udc_device = {
+ .name = "fsl-usb2-udc",
+ .id = -1,
+ .dev = {
+ .dma_mask = &otg_dmamask,
+ .coherent_dma_mask = 0xffffffffUL,
+ },
+ .resource = otg_resources,
+ .num_resources = ARRAY_SIZE(otg_resources),
+};
+
+/* OTG host */
+struct platform_device mxc_otg_host = {
+ .name = "mxc-ehci",
+ .id = 0,
+ .dev = {
+ .coherent_dma_mask = 0xffffffff,
+ .dma_mask = &otg_dmamask,
+ },
+ .resource = otg_resources,
+ .num_resources = ARRAY_SIZE(otg_resources),
+};
+
+/* USB host 1 */
+
+static u64 usbh1_dmamask = 0xffffffffUL;
+
+static struct resource mxc_usbh1_resources[] = {
+ {
+ .start = OTG_BASE_ADDR + 0x200,
+ .end = OTG_BASE_ADDR + 0x3ff,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = MXC_INT_USB1,
+ .end = MXC_INT_USB1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device mxc_usbh1 = {
+ .name = "mxc-ehci",
+ .id = 1,
+ .dev = {
+ .coherent_dma_mask = 0xffffffff,
+ .dma_mask = &usbh1_dmamask,
+ },
+ .resource = mxc_usbh1_resources,
+ .num_resources = ARRAY_SIZE(mxc_usbh1_resources),
+};
+
+/* USB host 2 */
+static u64 usbh2_dmamask = 0xffffffffUL;
+
+static struct resource mxc_usbh2_resources[] = {
+ {
+ .start = OTG_BASE_ADDR + 0x400,
+ .end = OTG_BASE_ADDR + 0x5ff,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = MXC_INT_USB2,
+ .end = MXC_INT_USB2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+struct platform_device mxc_usbh2 = {
+ .name = "mxc-ehci",
+ .id = 2,
+ .dev = {
+ .coherent_dma_mask = 0xffffffff,
+ .dma_mask = &usbh2_dmamask,
+ },
+ .resource = mxc_usbh2_resources,
+ .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
+};
+
+
/* GPIO port description */
static struct mxc_gpio_port imx_gpio_ports[] = {
[0] = {
diff --git a/arch/arm/mach-mx2/devices.h b/arch/arm/mach-mx2/devices.h
index 049005b..facb4d6 100644
--- a/arch/arm/mach-mx2/devices.h
+++ b/arch/arm/mach-mx2/devices.h
@@ -20,3 +20,7 @@ extern struct platform_device mxc_i2c_device0;
extern struct platform_device mxc_i2c_device1;
extern struct platform_device mxc_sdhc_device0;
extern struct platform_device mxc_sdhc_device1;
+extern struct platform_device mxc_otg_udc_device;
+extern struct platform_device mxc_otg_host;
+extern struct platform_device mxc_usbh1;
+extern struct platform_device mxc_usbh2;
diff --git a/arch/arm/mach-mx2/imx27_visstrim_m10.c
b/arch/arm/mach-mx2/imx27_visstrim_m10.c
index c8c67c7..87a2566 100644
--- a/arch/arm/mach-mx2/imx27_visstrim_m10.c
+++ b/arch/arm/mach-mx2/imx27_visstrim_m10.c
@@ -38,6 +38,10 @@
#include <mach/iomux.h>
#include <mach/board-imx27_visstrim_m10.h>
#include <mach/mxc_nand.h>
+#include <mach/mxc_ehci.h>
+#include <mach/ulpi.h>
+#include <linux/usb/xcvr.h>
+#include <linux/usb/isp1504_xcvr.h>
#include "devices.h"
@@ -129,6 +133,56 @@ static struct platform_device
visstrim_m10_nor_mtd_device = {
.resource = &visstrim_m10_flash_resource,
};
+
+/* USB support */
+
+#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
+ PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
+
+static int usbotg_init(struct platform_device *pdev)
+{
+ unsigned int usbotg_pins[] = {
+ PC9_PF_USBOTG_DATA0,
+ PC11_PF_USBOTG_DATA1,
+ PC10_PF_USBOTG_DATA2,
+ PC13_PF_USBOTG_DATA3,
+ PC12_PF_USBOTG_DATA4,
+ PC7_PF_USBOTG_DATA5,
+ PC8_PF_USBOTG_DATA6,
+ PE25_PF_USBOTG_DATA7,
+ PE24_PF_USBOTG_CLK,
+ PE2_PF_USBOTG_DIR,
+ PE0_PF_USBOTG_NXT,
+ PE1_PF_USBOTG_STP,
+ PB23_PF_USB_PWR,
+ PB24_PF_USB_OC,
+ };
+
+ mxc_gpio_setup_multiple_pins(usbotg_pins,
+ ARRAY_SIZE(usbotg_pins), "USB OTG");
+
+ /* enable chip select */
+ /* TODO Handle properly failures when failing requesting GPIO */
+ gpio_request(PF17_PF_PC_READY, "USBOTG_CS");
+ mxc_gpio_mode(PF17_PF_PC_READY | GPIO_GPIO | GPIO_OUT);
+ gpio_direction_output(PF17_PF_PC_READY, 0);
+
+ return 0;
+}
+
+static struct usb_xcvr isp1504_ulpi_xcvr = {
+ .access = &mxc_ulpi_access_ops,
+ .driver = &isp1504_xcvr_driver,
+};
+
+static struct mxc_usbh_platform_data usbotg_pdata = {
+ .init = usbotg_init,
+ .xcvr = &isp1504_ulpi_xcvr,
+ .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
+ .flags = MXC_EHCI_POWER_PINS_ENABLED,
+};
+
+/* UART */
static int mxc_uart0_pins[] = {
PE12_PF_UART1_TXD,
PE13_PF_UART1_RXD,
@@ -330,6 +384,7 @@ static void __init visstrim_m10_board_init(void)
mxc_register_device(&mxc_nand_device, &visstrim_m10_nand_board_info);
mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
+ mxc_register_device(&mxc_otg_host, &usbotg_pdata);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
mxc_init_vpu();
}
--
Javier Martin
Vista Silicon S.L.
Universidad de Cantabria
CDTUC - FASE C - Oficina S-345
Avda de los Castros s/n
39005- Santander. Cantabria. Spain
+34 942 25 32 60
www.vista-silicon.com
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