Re: using cacheable buffer for descriptor

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2009/7/4 Ming Lei <tom.leiming@xxxxxxxxx>:
>
> On Fri, 3 Jul 2009 23:43:51 -0400
> "Yang Fei-AFY095" <fei.yang@xxxxxxxxxxxx> wrote:
>
>>
>> >> This is called when we submit urb, for OUT data, I think it's
>> >> sufficient for cache consistency. But what I need to know is how
>> >> we guarantee the cache consistency for IN data, because the DMA is
>> >> going
>>
>> >> to update the physical memory when receiving data from device,
>> >> something has to be done upon completion of the urb.
>>
>> >Obviously you looked at map_urb_for_dma.  Have you also looked at
>> unmap_urb_for_dma?
>>
>> unmap_urb_for_dma -> dma_unmap_single
>>
>> dma_unmap_single is defined in arch/arm/include/asm/dma-mapping.h as
>> following
>>
>> ------ snip ------
>> #ifndef CONFIG_DMABOUNCE
>> static inline void
>> dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size,
>>                enum dma_data_direction dir)
>> {
>>       /* nothing to do */
>> }
>
> Since the ARM core of TI-OMAP is not cache coherent, it seems
> dma_unmap_*() should do something(such as invalidate cache)
> instead of nothing.

dma_map_*() can invalidate cache lines, so dma_unmap_*() may do nothing.
But if someone accesses the dma buffer during dma transfer, you may
get the  inconsistent result.

-- 
Lei Ming
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