On 10.2.2020 20.59, Greg Kroah-Hartman wrote: > On Mon, Jan 20, 2020 at 03:24:22PM +0100, Nicolas Saenz Julienne wrote: >> This PCIe controller chip is used on the Raspberry Pi 4 and multiple >> adapter cards. There is no publicly available documentation for the >> chip, yet both the downstream RPi4 kernel and the controller cards >> support/advertise LPM support. >> >> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@xxxxxxx> >> --- >> drivers/usb/host/xhci-pci.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c >> index 4917c5b033fa..c1976e98992b 100644 >> --- a/drivers/usb/host/xhci-pci.c >> +++ b/drivers/usb/host/xhci-pci.c >> @@ -241,6 +241,9 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) >> pdev->device == 0x3432) >> xhci->quirks |= XHCI_BROKEN_STREAMS; >> >> + if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) >> + xhci->quirks |= XHCI_LPM_SUPPORT; >> + >> if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && >> pdev->device == 0x1042) >> xhci->quirks |= XHCI_BROKEN_STREAMS; > > Mathias, is this in your review queue? > Ah yes, before adding link power management support for this controller we should check that it has sane (or any) exit latency values set in its HCSPARAMS3 capability register. Nicolas, if you have this controller could you show the capability registers: cat /sys/kernel/debug/usb/xhci/*/reg-cap -Mathias
