From: Sriharsha Allenki <sallenki@xxxxxxxxxxxxxx> Adds bindings for QCS404 USB PHY supporting Low-Speed, Full-Speed and Hi-Speed USB connectivity on Qualcomm chipsets. [bod: Converted to YAML. Changed name dropping snps component] Signed-off-by: Sriharsha Allenki <sallenki@xxxxxxxxxxxxxx> Signed-off-by: Anu Ramanathan <anur@xxxxxxxxxxxxxx> Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx> Cc: Andy Gross <agross@xxxxxxxxxx> Cc: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> Cc: Kishon Vijay Abraham I <kishon@xxxxxx> Cc: Rob Herring <robh+dt@xxxxxxxxxx> Cc: Mark Rutland <mark.rutland@xxxxxxx> Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@xxxxxxxxx> Cc: linux-arm-msm@xxxxxxxxxxxxxxx Cc: linux-kernel@xxxxxxxxxxxxxxx Cc: devicetree@xxxxxxxxxxxxxxx Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx> --- .../bindings/phy/qcom,qcs404-usb-hs.yaml | 78 +++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml diff --git a/Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml b/Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml new file mode 100644 index 000000000000..4bc7a3334b54 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/qcom,qcs404-usb-hs.yaml#"; +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; + +title: Qualcomm Synopsys QCS-404 High-Speed PHY + +maintainers: + - Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx> + +description: | + Qualcomm QCS-404 Low-Speed, Full-Speed, Hi-Speed USB PHY + +properties: + compatible: + enum: + - qcom,qcs404-usb-hsphy + + reg: + maxItems: 1 + description: USB PHY base address and length of the register map. + + "#phy-cells": + const: 0 + description: Should be 0. See phy/phy-bindings.txt for details. + + clocks: + items: + - description: Rescource Power Management clock + - descirption: PHY AHB clock + - description: Retention clock + + clock-names: + items: + - const: ref + - const: phy + - const: sleep + + resets: + items: + - description: PHY core reset + - description: POR reset + + reset-names: + items: + - description: phy + - description: por + + vdd-supply: + maxItems: 1 + description: phandle to the regulator VDD supply node. + + vdda1p8-supply: + maxItems: 1 + description: phandle to the regulator 1.8V supply node. + + vdda3p3-supply: + maxItems: 1 + description: phandle to the regulator 3.3V supply node. + +Example: + + phy@7a000 { + compatible = "qcom,qcs404-usb-hsphy"; + reg = <0x7a000 0x200>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "phy", "sleep"; + resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>, + <&gcc GCC_USB2A_PHY_BCR>; + reset-names = "phy", "por"; + vdd-supply = <&vreg_l4_1p2>; + vdda1p8-supply = <&vreg_l5_1p8>; + vdda3p3-supply = <&vreg_l12_3p3>; + }; -- 2.24.0
