The Synopsys xHC has an internal TRB cache of size TRB_CACHE_SIZE for each endpoint. The default value for TRB_CACHE_SIZE is 16 for SS and 8 for HS. The controller loads and updates the TRB cache from the transfer ring in system memory whenever the driver issues a start transfer or update transfer command. For chained TRBs, the Synopsys xHC requires that the total amount of bytes for all TRBs loaded in the TRB cache be greater than or equal to 1 MPS. Or the chain ends within the TRB cache (with a last TRB). If this requirement is not met, the controller will not be able to send or receive a packet and it will hang causing a driver timeout and error. This patch set adds logic to the XHCI driver to detect and prevent this from happening along with the quirk to enable this logic for Synopsys HAPS platform. Tejas Joglekar (4): usb: xhci: Synopsys xHC consolidate TRBs usb: dwc3: Add device property consolidate-trbs usb: xhci: Set quirk for XHCI_CONSOLIDATE_TRBS dt-bindings: usb: Add snps,consolidate-trbs & consolidate-trbs Documentation/devicetree/bindings/usb/dwc3.txt | 6 + Documentation/devicetree/bindings/usb/usb-xhci.txt | 1 + drivers/usb/dwc3/core.c | 2 + drivers/usb/dwc3/core.h | 2 + drivers/usb/dwc3/dwc3-haps.c | 1 + drivers/usb/dwc3/host.c | 3 + drivers/usb/host/xhci-pci.c | 3 + drivers/usb/host/xhci-plat.c | 3 + drivers/usb/host/xhci-ring.c | 278 ++++++++++++++++++++- drivers/usb/host/xhci.c | 3 + drivers/usb/host/xhci.h | 23 ++ 11 files changed, 317 insertions(+), 8 deletions(-) -- 2.11.0
