Hi Linus, On 11.12.2019 00:13, Linus Walleij wrote: > On Mon, Dec 9, 2019 at 5:33 PM Marek Szyprowski > <m.szyprowski@xxxxxxxxxxx> wrote: >> On 06.12.2019 14:43, Linus Walleij wrote: >>> On Fri, Dec 6, 2019 at 12:43 PM Marek Szyprowski >>> <m.szyprowski@xxxxxxxxxxx> wrote: >>> >>>> arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts: invert RESET >>>> gpio polarity (to ACTIVE_LOW), not sure about INTN gpio >>> AFAICT INTN should be set to ACTIVE_HIGH if it is working with the >>> current code in the kernel. >>> >>> However it is pretty confusing with the "N" at the end of INTN, >>> indicating negative polarity. Maybe it means something else, >>> I haven't checked the datasheet. Maybe all boards have inverters >>> on these lines so they come out active high. >> Well, this line is indeed active low. The datasheet names it 'int_n'. >> However I think it makes sense to keep it as ACTIVE_HIGH, because the >> 'n' is already in the gpio name (and dt binding). In contrary, the reset >> gpio pin/binding is named without the 'n', thus I want to clarify it as >> active low. The datasheet names it 'reset_n'. > Agreed. > >> If you are okay with this approach, I will send a patchset fixing >> polarity in DTS together with your patch converting the driver to gpio >> descriptors with the fixup for the reset gpio polarity. > Yes this approach should work, will you fold in fixes to my > patch (like asserting reset high) as well or do you want me > to send a v2? I will fold a fixup for your patch. Best regards -- Marek Szyprowski, PhD Samsung R&D Institute Poland
