Diff vs v3:
Clean up ehci_langwell_probe.
The [PATCH 3/4 v2] and [PATCH 4/4 v2] keep unchanged since no more comments for them.
>From feb204b339fd1e17ab089c2cc0d90c99f3310a97 Mon Sep 17 00:00:00 2001
From: Alek Du <alek.du@xxxxxxxxx>
Date: Wed, 10 Jun 2009 15:20:21 +0800
Subject: [PATCH] EHCI: Support Intel Moorestown MPH and OTG host
The Intel Moorestown platform has EHCI MPH and EHCI OTG host. This patch adds
PCI probe part for them. The HNP part and SRAM part will be added in another
patch. This patch depends on the OTG transceive and OTG client patch from Hang
Yuan that should be accepted already.
Signed-off-by: Jacob Pan <jacob.jun.pan@xxxxxxxxx>
Signed-off-by: Alek Du <alek.du@xxxxxxxxx>
---
drivers/usb/host/ehci-hcd.c | 20 ++++
drivers/usb/host/ehci-hub.c | 13 ++-
drivers/usb/host/ehci-langwell-pci.c | 210 ++++++++++++++++++++++++++++++++++
drivers/usb/host/ehci-pci.c | 26 ++++
drivers/usb/host/ehci.h | 4 +
5 files changed, 271 insertions(+), 2 deletions(-)
create mode 100644 drivers/usb/host/ehci-langwell-pci.c
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 730dc34..32f79c7 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -43,6 +43,8 @@
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/unaligned.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/langwell_otg.h>
/*-------------------------------------------------------------------------*/
@@ -1048,6 +1050,10 @@ MODULE_LICENSE ("GPL");
#ifdef CONFIG_PCI
#include "ehci-pci.c"
#define PCI_DRIVER ehci_pci_driver
+#ifdef CONFIG_USB_LANGWELL_OTG
+#include "ehci-langwell-pci.c"
+#define LNW_OTG_HOST_DRIVER ehci_otg_driver
+#endif
#endif
#ifdef CONFIG_USB_EHCI_FSL
@@ -1135,8 +1141,19 @@ static int __init ehci_hcd_init(void)
if (retval < 0)
goto clean3;
#endif
+
+#ifdef LNW_OTG_HOST_DRIVER
+ retval = langwell_register_host(&LNW_OTG_HOST_DRIVER);
+ if (retval < 0)
+ goto clean4;
+#endif
return retval;
+#ifdef LNW_OTG_HOST_DRIVER
+clean4:
+ langwell_unregister_host(&LNW_OTG_HOST_DRIVER);
+#endif
+
#ifdef OF_PLATFORM_DRIVER
/* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
clean3:
@@ -1177,6 +1194,9 @@ static void __exit ehci_hcd_cleanup(void)
#ifdef PS3_SYSTEM_BUS_DRIVER
ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
#endif
+#ifdef LNW_OTG_HOST_DRIVER
+ langwell_unregister_host(&LNW_OTG_HOST_DRIVER);
+#endif
#ifdef DEBUG
debugfs_remove(ehci_debug_root);
#endif
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 7a4b47f..849d913 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -112,6 +112,7 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
int port;
int mask;
u32 __iomem *hostpc_reg = NULL;
+ int rc = 0;
ehci_dbg(ehci, "suspend root hub\n");
@@ -207,8 +208,12 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
ehci_readl(ehci, &ehci->regs->intr_enable);
ehci->next_statechange = jiffies + msecs_to_jiffies(10);
+
+ if (ehci->has_otg && ehci->otg_suspend)
+ rc = ehci->otg_suspend(hcd);
+
spin_unlock_irq (&ehci->lock);
- return 0;
+ return rc;
}
@@ -220,6 +225,7 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
u32 power_okay;
int i;
u8 resume_needed = 0;
+ int rc = 0;
if (time_before (jiffies, ehci->next_statechange))
msleep(5);
@@ -307,9 +313,12 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
/* Now we can safely re-enable irqs */
ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
+ if (ehci->has_otg && ehci->otg_resume)
+ rc = ehci->otg_resume(hcd);
+
spin_unlock_irq (&ehci->lock);
ehci_handover_companion_ports(ehci);
- return 0;
+ return rc;
}
#else
diff --git a/drivers/usb/host/ehci-langwell-pci.c b/drivers/usb/host/ehci-langwell-pci.c
new file mode 100644
index 0000000..708cf3e
--- /dev/null
+++ b/drivers/usb/host/ehci-langwell-pci.c
@@ -0,0 +1,210 @@
+/*
+ * Intel Moorestown Platform Langwell OTG EHCI Controller PCI Bus Glue.
+ *
+ * Copyright (c) 2008 Alek Du <alek.du@xxxxxxxxx>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License 2 as published by the
+ * Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+static int usb_otg_suspend(struct usb_hcd *hcd)
+{
+ struct otg_transceiver *otg;
+ struct langwell_otg *iotg;
+
+ otg = otg_get_transceiver();
+ if (otg == NULL) {
+ printk(KERN_ERR "%s Failed to get otg transceiver\n", __func__);
+ return -EINVAL;
+ }
+ iotg = container_of(otg, struct langwell_otg, otg);
+ printk(KERN_INFO "%s OTG HNP update suspend\n", __func__);
+ if (iotg->otg.default_a)
+ iotg->hsm.a_suspend_req = 1;
+ else
+ iotg->hsm.b_bus_req = 0;
+ langwell_update_transceiver();
+ otg_put_transceiver(otg);
+ return 0;
+}
+
+static int usb_otg_resume(struct usb_hcd *hcd)
+{
+ struct otg_transceiver *otg;
+ struct langwell_otg *iotg;
+
+ otg = otg_get_transceiver();
+ if (otg == NULL) {
+ printk(KERN_ERR "%s Failed to get otg transceiver\n", __func__);
+ return -EINVAL;
+ }
+ iotg = container_of(otg, struct langwell_otg, otg);
+ printk(KERN_INFO "%s OTG HNP update resume\n", __func__);
+ if (iotg->otg.default_a) {
+ iotg->hsm.b_bus_resume = 1;
+ langwell_update_transceiver();
+ }
+ otg_put_transceiver(otg);
+ return 0;
+}
+
+static int usb_otg_notify(struct notifier_block *self,
+ unsigned long action, void *dev)
+{
+ struct usb_device *udev;
+ struct otg_transceiver *otg;
+ struct langwell_otg *iotg;
+ int update = 0;
+ udev = (struct usb_device *)dev;
+
+ otg = otg_get_transceiver();
+ if (otg == NULL) {
+ printk(KERN_ERR "%s Failed to get otg transceiver\n", __func__);
+ return -EINVAL;
+ }
+ iotg = container_of(otg, struct langwell_otg, otg);
+
+ if (strcmp(udev->bus->bus_name, dev_name(&iotg->pdev->dev))) {
+ pr_debug("%s don't care. %s not match %s\n", __func__,
+ udev->bus->bus_name, dev_name(&iotg->pdev->dev));
+ otg_put_transceiver(otg);
+ return NOTIFY_DONE;
+ }
+ switch (action) {
+ case USB_DEVICE_ADD:
+ pr_debug("Notify OTG HNP add device\n");
+ if (iotg->otg.default_a == 1)
+ iotg->hsm.b_conn = 1;
+ else
+ iotg->hsm.a_conn = 1;
+ update = 1;
+ break;
+ case USB_DEVICE_REMOVE:
+ pr_debug("Notify OTG HNP delete device\n");
+ if (iotg->otg.default_a == 1)
+ iotg->hsm.b_conn = 0;
+ else
+ iotg->hsm.a_conn = 0;
+ update = 1;
+ break;
+ default:
+ otg_put_transceiver(otg);
+ return NOTIFY_DONE;
+ }
+ if (update && spin_trylock(&iotg->wq_lock)) {
+ langwell_update_transceiver();
+ spin_unlock(&iotg->wq_lock);
+ }
+ otg_put_transceiver(otg);
+ return NOTIFY_OK;
+}
+
+static struct notifier_block usbotg_nb = {
+ .notifier_call = usb_otg_notify,
+};
+
+static int ehci_langwell_probe(struct pci_dev *pdev,
+ const struct pci_device_id *id)
+{
+ struct hc_driver *driver;
+ struct langwell_otg *iotg;
+ struct otg_transceiver *otg;
+ struct usb_hcd *hcd;
+ struct ehci_hcd *ehci;
+ int irq;
+ int retval;
+
+ pr_debug("initializing Langwell USB OTG Host Controller\n");
+
+ /* we need not call pci_enable_dev since otg transceiver already take
+ * the control of this device and this probe actaully gets called by
+ * otg transceiver driver with HNP protocol.
+ */
+ irq = pdev->irq;
+
+ if (!id)
+ return -EINVAL;
+ driver = (struct hc_driver *)id->driver_data;
+ if (!driver)
+ return -EINVAL;
+
+ hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
+ if (!hcd) {
+ retval = -ENOMEM;
+ goto err1;
+ }
+
+ hcd->self.otg_port = 1;
+ ehci = hcd_to_ehci(hcd);
+ /* this will be called in ehci_bus_suspend and ehci_bus_resume */
+ ehci->otg_suspend = usb_otg_suspend;
+ ehci->otg_resume = usb_otg_resume;
+ otg = otg_get_transceiver();
+ if (otg == NULL) {
+ printk(KERN_ERR "%s Failed to get otg transceiver\n", __func__);
+ retval = -EINVAL;
+ goto err1;
+ }
+ iotg = container_of(otg, struct langwell_otg, otg);
+ hcd->regs = iotg->regs;
+ hcd->rsrc_start = pci_resource_start(pdev, 0);
+ hcd->rsrc_len = pci_resource_len(pdev, 0);
+
+ if (hcd->regs == NULL) {
+ dev_dbg(&pdev->dev, "error mapping memory\n");
+ retval = -EFAULT;
+ goto err2;
+ }
+ retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
+ if (retval != 0)
+ goto err2;
+ retval = otg_set_host(otg, &hcd->self);
+ if (!otg->default_a)
+ hcd->self.is_b_host = 1;
+ usb_register_notify(&usbotg_nb);
+ pr_debug("Registered notify handler for Langwell OTG\n");
+ otg_put_transceiver(otg);
+ return retval;
+
+err2:
+ usb_put_hcd(hcd);
+err1:
+ dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
+ return retval;
+}
+
+void ehci_langwell_remove(struct pci_dev *dev)
+{
+ struct usb_hcd *hcd = pci_get_drvdata(dev);
+
+ if (!hcd)
+ return;
+ usb_unregister_notify(&usbotg_nb);
+ usb_remove_hcd(hcd);
+ usb_put_hcd(hcd);
+}
+
+/* Langwell OTG EHCI driver */
+static struct pci_driver ehci_otg_driver = {
+ .name = "ehci-langwell",
+ .id_table = pci_ids,
+
+ .probe = ehci_langwell_probe,
+ .remove = ehci_langwell_remove,
+
+#ifdef CONFIG_PM
+ .suspend = usb_hcd_pci_suspend,
+ .resume = usb_hcd_pci_resume,
+#endif
+ .shutdown = usb_hcd_pci_shutdown,
+};
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 5aa8bce..b9f4b88 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -70,6 +70,7 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
u8 rev;
u32 temp;
int retval;
+ int force_otg_hc_mode = 0;
switch (pdev->vendor) {
case PCI_VENDOR_ID_TOSHIBA_2:
@@ -83,6 +84,20 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
#endif
}
break;
+ case PCI_VENDOR_ID_INTEL:
+ if (pdev->device == 0x0811) {
+ ehci_info(ehci, "Detected Langwell OTG HC\n");
+ ehci->no_io_watchdog = 1;
+ hcd->has_tt = 1;
+ ehci->has_hostpc = 1;
+ ehci->has_otg = 1;
+ force_otg_hc_mode = 1;
+ } else if (pdev->device == 0x0806) {
+ ehci_info(ehci, "Detected Langwell MPH\n");
+ ehci->no_io_watchdog = 1;
+ hcd->has_tt = 1;
+ ehci->has_hostpc = 1;
+ }
}
ehci->caps = hcd->regs;
@@ -118,6 +133,8 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
/* cache this readonly data; minimize chip reads */
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
+ if (force_otg_hc_mode)
+ ehci_reset(ehci);
retval = ehci_halt(ehci);
if (retval)
@@ -418,6 +435,15 @@ static const struct pci_device_id pci_ids [] = { {
PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_EHCI, ~0),
.driver_data = (unsigned long) &ehci_pci_hc_driver,
},
+ {
+ /* handle MRST USB 2.0 EHCI controller */
+ PCI_DEVICE_CLASS(0x0c2000, ~0),
+ .driver_data = (unsigned long) &ehci_pci_hc_driver,
+ },
+ {
+ PCI_DEVICE_CLASS(0x0c03fe, ~0),
+ .driver_data = (unsigned long) &ehci_pci_hc_driver,
+ },
{ /* end: all zeroes */ }
};
MODULE_DEVICE_TABLE(pci, pci_ids);
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index df6ab1a..f61bab5 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -136,6 +136,10 @@ struct ehci_hcd { /* one per controller */
#define OHCI_HCCTRL_LEN 0x4
__hc32 *ohci_hcctrl_reg;
unsigned has_hostpc:1;
+ unsigned has_otg:1; /* if it is otg host*/
+ /* otg host have additional bus_suspend and bus_resume */
+ int (*otg_suspend)(struct usb_hcd *hcd);
+ int (*otg_resume)(struct usb_hcd *hcd);
u8 sbrn; /* packed release number */
--
1.6.0.4
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