On Fri, Oct 11, 2019 at 5:06 PM Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> wrote: > > On Fri, Oct 11, 2019 at 10:53:47AM -0400, Alan Stern wrote: > > On Fri, 11 Oct 2019, Andrey Konovalov wrote: > > > > > On Fri, Oct 11, 2019 at 4:08 PM Alan Stern <stern@xxxxxxxxxxxxxxxxxxx> wrote: > > > > > > Now yes, it's true that defining status as an array on the stack is > > > > also a bug, since USB transfer buffers are not allowed to be stack > > > > variables. > > > > > > Hi Alan, > > > > > > I'm curious, what is the reason for disallowing that? Should we try to > > > somehow detect such cases automatically? > > > > Transfer buffers are read and written by DMA. On systems that don't > > have cache-coherent DMA controllers, it is essential that the CPU does > > not access any cache line involved in a DMA transfer while the transfer > > is in progress. Otherwise the data in the cache would be different > > from the data in the buffer, leading to corruption. > > > > (In theory it would be okay for the CPU to read (not write!) a cache > > line assigned to a buffer for a DMA write (not read!) transfer. But > > even doing that isn't really a good idea.) > > > > (Also, this isn't an issue for x86 architectures, because x86 has > > cache-coherent DMA. But it is an issue on other architectures.) > > > > In practice, this means transfer buffers have to be allocated by > > something like kmalloc, so that they occupies their own separate set of > > cache lines. Buffers on the stack obviously don't satisfy this > > requirement. > > > > At some point there was a discussion about automatically detecting when > > on-stack (or otherwise invalid) buffers are used for DMA transfers. I > > don't recall what the outcome was. > > A patchset from Kees was sent, but it needs a bit more work... Hi Greg, Could you send a link to the patchset? Thanks!
