Hi Balbi, This SOC was released last year, and it was woke up on kernel v4.9. After these days debugging I think it seem more like a hardware related issue. We will check the Synopsys databook again to find something which may help, and may consider to try these cases on more recent kernel later. Thank you for your advices~ Felipe Balbi <felipe.balbi@xxxxxxxxxxxxxxx> 于2019年9月23日周一 下午6:45写道： > > > Hi Alex, > > alex zheng <tc0721@xxxxxxxxx> writes: > >> > I am a user of dwc3 USB host controller, I found there are some > >> > confused behavior of trb event on this controller. > >> > When I run a raw USB data transfer(run bulk in&out transfer with > >> > libusb) and iperf3(over rndis) at the same time, > >> > there are some strange interrupts occurs and make the driver report > >> > error(ERROR DMA transfer). > >> > And: > >> > >> So dwc3 is workingo n host mode. Which platform is this? > > > > This is our self-design platform (ARM v7 cpu core with synopsys DWC > > USB3.0 controller). > > version info: Linux localhost 4.9.130-645692-g6ecde01-dirty #394 SMP > > PREEMPT Sun Sep 22 15:10:51 CST 2019 armv7l > > This is a brand new design and you're waking it up on v4.9? Could've > tracked upstream more closely, IMHO. > > >> > 1. this problem only hapened in USB SS mode > >> > 2. this problem seems not hapen when I run same test case with other > >> > xhci controller(such as asmedia/intel pcie xhci controller) on PC. > >> > 3. the kernel version is 4.9.130 > >> > >> Have you tried a more recent kernel? 4.9 is really ancient. Please try > >> v5.3. > > > > Our platform only support 4.9 kernel now, and it may take a lot of > > work to do to support the recent kernel. > > In that case, I'm afraid you're on your own. Have a look at known > synopsys errata. > > On a side-node, getting a cortex-A7 to boot with upstream kernel should > be only about adding a DeviceTree nowadays. Remember that for Linux to > boot, all you need is a system timer and UART. If you're using ARM IP > for interrupts, timers, etc, it should be really straight forward to > boot on v5.3 > > > Are there any causes may lead the link TRB trigger a interrupt when > > the IOC bit is not setted? > > No idea, perhaps you should have a deeper look at both Synopsys databook > and xHCI specification. > > In any case, v4.9 is really old. > > Good luck > > -- > balbi
