Tegra XHCI controler can be placed in ELPG (Engine Level PowerGate) state for power saving when all of the connected USB devices are in suspended state. This patch series includes clk, phy and pmc changes that are required for properly place controller in ELPG and bring controller out of ELPG. JC Kuo (8): clk: tegra: Add PLLE HW power sequencer control clk: tegra: don't enable PLLE HW sequencer at init phy: tegra: xusb: t210: rearrange UPHY init phy: tegra: xusb: add sleepwalk and suspend/resume soc/tegra: pmc: support T210 USB 2.0 Sleepwalk phy: tegra: xusb: t210: support wake and sleepwalk arm64: tegra: add Tegra210 XUSB PADCTL irq xhci: tegra: enable ELPG for runtime/system PM arch/arm64/boot/dts/nvidia/tegra210.dtsi | 3 +- drivers/clk/tegra/clk-pll.c | 12 - drivers/clk/tegra/clk-tegra210.c | 45 + drivers/phy/tegra/xusb-tegra210.c | 1023 +++++++++++++++++----- drivers/phy/tegra/xusb.c | 80 +- drivers/phy/tegra/xusb.h | 10 + drivers/soc/tegra/pmc.c | 462 ++++++++++ drivers/usb/host/xhci-tegra.c | 802 ++++++++++++++--- include/linux/clk/tegra.h | 2 + include/linux/phy/tegra/xusb.h | 12 + include/soc/tegra/pmc.h | 13 + 11 files changed, 2108 insertions(+), 356 deletions(-) -- 2.17.1