Add EHCI and OHCI host support for RZ/A2.
Signed-off-by: Chris Brandt <chris.brandt@xxxxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
v4:
* "fclk" to "fck"
* changed phy reg size 0x10 -> 0x700
* added reviewed-by
v3:
* add usb_x1 as a clock source
* add clock-names
v2:
* changed to generic name usb@xxx
* Add space between compatible strings
---
arch/arm/boot/dts/r7s9210.dtsi | 66 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/arch/arm/boot/dts/r7s9210.dtsi b/arch/arm/boot/dts/r7s9210.dtsi
index 73041f04fef5..066e6fed11aa 100644
--- a/arch/arm/boot/dts/r7s9210.dtsi
+++ b/arch/arm/boot/dts/r7s9210.dtsi
@@ -329,6 +329,72 @@
status = "disabled";
};
+ ohci0: usb@e8218000 {
+ compatible = "generic-ohci";
+ reg = <0xe8218000 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 61>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ehci0: usb@e8218100 {
+ compatible = "generic-ehci";
+ reg = <0xe8218100 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 61>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ usb2_phy0: usb-phy@e8218200 {
+ compatible = "renesas,usb2-phy-r7s9210", "renesas,rcar-gen3-usb2-phy";
+ reg = <0xe8218200 0x700>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 61>, <&usb_x1_clk>;
+ clock-names = "fck", "usb_x1";
+ power-domains = <&cpg>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ ohci1: usb@e821a000 {
+ compatible = "generic-ohci";
+ reg = <0xe821a000 0x100>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 60>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ehci1: usb@e821a100 {
+ compatible = "generic-ehci";
+ reg = <0xe821a100 0x100>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 60>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ usb2_phy1: usb-phy@e821a200 {
+ compatible = "renesas,usb2-phy-r7s9210", "renesas,rcar-gen3-usb2-phy";
+ reg = <0xe821a200 0x700>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 60>, <&usb_x1_clk>;
+ clock-names = "fck", "usb_x1";
+ power-domains = <&cpg>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
sdhi0: sd@e8228000 {
compatible = "renesas,sdhi-r7s9210";
reg = <0xe8228000 0x8c0>;
--
2.16.1
