On 21.12.2018 04:58, Alan Stern wrote:
On Thu, 20 Dec 2018, Marc MERLIN wrote:
On Mon, Dec 17, 2018 at 09:45:44PM -0800, Marc MERLIN wrote:
On Mon, Dec 17, 2018 at 10:52:57AM -0500, Alan Stern wrote:
Point taken. I think I was thinking about USB ports that were routed to
either a xHCI or an EHCI chip depending on what's plugged into them, but
seems that I didn't quite understand how that worked.
It varies. For example, my office computer does exactly what you were
thinking: It routes SuperSpeed connections to the xHCI controller and
it routes high speed connections (even on the same port!) to one of the
EHCI controllers.
Thanks, so I'm not crazy, I thought I had seen this before.
I had a look at my work server today and thankfully it at least had a
USB3 setting, which when I turned it off, xhci was replaced with ehci as
expected.
Again, thanks Alan.
I just wrote a web page that hopefully google will index and show in
addition or in front of the other page I mentioned and that wasn't clear
enough about the 32 device limit being due to the xhci controller being
active, not due to USB3 devices being on the bus, or not.
http://marc.merlins.org/perso/linux/post_2018-12-20_Getting-Around-USB3-xhci-32-Device-Limit-_Max-number-of-devices-this-xHCI-host-supports-is-32_.html
Further reading:
https://forums.intel.com/s/question/0D50P00004905stSAA/hardware-limitations-on-usb-endpoints-xhci?language=en_US
Thanks again,
Just a small addition, many Intel xHCI controllers now support 64 devices.
It's possible to get the max device slots xHCI hardware supports from a xHC register.
(bits 7:0 of the HCSPARAMS1 capability register)
This can be found from debugfs, but it's not very practical:
mount -t debugfs none /sys/kernel/debug/
grep HCSPARAMS1 /sys/kernel/debug/usb/xhci/0000\:00\:14.0/reg-cap
HCSPARAMS1 = 0x1a000840
We only care about bits 7:0, by ignoring the other bits we get 0x00000040,
which is 64 in decimal.
So this xHCI supports 64 device slots.
-Mathias
