Hi Pengbo, Thank you for the patch! Yet something to improve: [auto build test ERROR on balbi-usb/next] [also build test ERROR on v4.18-rc6 next-20180720] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Pengbo-Mu/usb-dwc3-call-set-incr-burst-type-func/20180723-132027 base: https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git next config: i386-randconfig-s1-201829 (attached as .config) compiler: gcc-6 (Debian 6.4.0-9) 6.4.0 20171026 reproduce: # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): drivers/usb/dwc3/core.c: In function 'dwc3_core_init': >> drivers/usb/dwc3/core.c:843:2: error: implicit declaration of function 'dwc3_set_incr_burst_type' [-Werror=implicit-function-declaration] dwc3_set_incr_burst_type(dwc); ^~~~~~~~~~~~~~~~~~~~~~~~ cc1: some warnings being treated as errors vim +/dwc3_set_incr_burst_type +843 drivers/usb/dwc3/core.c 780 781 /** 782 * dwc3_core_init - Low-level initialization of DWC3 Core 783 * @dwc: Pointer to our controller context structure 784 * 785 * Returns 0 on success otherwise negative errno. 786 */ 787 static int dwc3_core_init(struct dwc3 *dwc) 788 { 789 u32 reg; 790 int ret; 791 792 if (!dwc3_core_is_valid(dwc)) { 793 dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); 794 ret = -ENODEV; 795 goto err0; 796 } 797 798 /* 799 * Write Linux Version Code to our GUID register so it's easy to figure 800 * out which kernel version a bug was found. 801 */ 802 dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE); 803 804 /* Handle USB2.0-only core configuration */ 805 if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == 806 DWC3_GHWPARAMS3_SSPHY_IFC_DIS) { 807 if (dwc->maximum_speed == USB_SPEED_SUPER) 808 dwc->maximum_speed = USB_SPEED_HIGH; 809 } 810 811 ret = dwc3_phy_setup(dwc); 812 if (ret) 813 goto err0; 814 815 if (!dwc->ulpi_ready) { 816 ret = dwc3_core_ulpi_init(dwc); 817 if (ret) 818 goto err0; 819 dwc->ulpi_ready = true; 820 } 821 822 if (!dwc->phys_ready) { 823 ret = dwc3_core_get_phy(dwc); 824 if (ret) 825 goto err0a; 826 dwc->phys_ready = true; 827 } 828 829 ret = dwc3_core_soft_reset(dwc); 830 if (ret) 831 goto err0a; 832 833 dwc3_core_setup_global_control(dwc); 834 dwc3_core_num_eps(dwc); 835 836 ret = dwc3_setup_scratch_buffers(dwc); 837 if (ret) 838 goto err1; 839 840 /* Adjust Frame Length */ 841 dwc3_frame_length_adjustment(dwc); 842 > 843 dwc3_set_incr_burst_type(dwc); 844 845 usb_phy_set_suspend(dwc->usb2_phy, 0); 846 usb_phy_set_suspend(dwc->usb3_phy, 0); 847 ret = phy_power_on(dwc->usb2_generic_phy); 848 if (ret < 0) 849 goto err2; 850 851 ret = phy_power_on(dwc->usb3_generic_phy); 852 if (ret < 0) 853 goto err3; 854 855 ret = dwc3_event_buffers_setup(dwc); 856 if (ret) { 857 dev_err(dwc->dev, "failed to setup event buffers\n"); 858 goto err4; 859 } 860 861 /* 862 * ENDXFER polling is available on version 3.10a and later of 863 * the DWC_usb3 controller. It is NOT available in the 864 * DWC_usb31 controller. 865 */ 866 if (!dwc3_is_usb31(dwc) && dwc->revision >= DWC3_REVISION_310A) { 867 reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); 868 reg |= DWC3_GUCTL2_RST_ACTBITLATER; 869 dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); 870 } 871 872 if (dwc->revision >= DWC3_REVISION_250A) { 873 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); 874 875 /* 876 * Enable hardware control of sending remote wakeup 877 * in HS when the device is in the L1 state. 878 */ 879 if (dwc->revision >= DWC3_REVISION_290A) 880 reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; 881 882 if (dwc->dis_tx_ipgap_linecheck_quirk) 883 reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS; 884 885 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 886 } 887 888 /* 889 * Must config both number of packets and max burst settings to enable 890 * RX and/or TX threshold. 891 */ 892 if (dwc3_is_usb31(dwc) && dwc->dr_mode == USB_DR_MODE_HOST) { 893 u8 rx_thr_num = dwc->rx_thr_num_pkt_prd; 894 u8 rx_maxburst = dwc->rx_max_burst_prd; 895 u8 tx_thr_num = dwc->tx_thr_num_pkt_prd; 896 u8 tx_maxburst = dwc->tx_max_burst_prd; 897 898 if (rx_thr_num && rx_maxburst) { 899 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 900 reg |= DWC31_RXTHRNUMPKTSEL_PRD; 901 902 reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); 903 reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); 904 905 reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); 906 reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); 907 908 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 909 } 910 911 if (tx_thr_num && tx_maxburst) { 912 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 913 reg |= DWC31_TXTHRNUMPKTSEL_PRD; 914 915 reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); 916 reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); 917 918 reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); 919 reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); 920 921 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 922 } 923 } 924 925 return 0; 926 927 err4: 928 phy_power_off(dwc->usb3_generic_phy); 929 930 err3: 931 phy_power_off(dwc->usb2_generic_phy); 932 933 err2: 934 usb_phy_set_suspend(dwc->usb2_phy, 1); 935 usb_phy_set_suspend(dwc->usb3_phy, 1); 936 937 err1: 938 usb_phy_shutdown(dwc->usb2_phy); 939 usb_phy_shutdown(dwc->usb3_phy); 940 phy_exit(dwc->usb2_generic_phy); 941 phy_exit(dwc->usb3_generic_phy); 942 943 err0a: 944 dwc3_ulpi_exit(dwc); 945 946 err0: 947 return ret; 948 } 949 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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