[PATCH 2/2] ARM: add OTG pin-function definitions and fsl-usb2-udc bindings to pcm037

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From: Guennadi Liakhovetski <lg@xxxxxxx>

Add support for the i.MX31 OTG controller in pure device mode to the pcm037
board.

Signed-off-by: Guennadi Liakhovetski <lg@xxxxxxx>
---

Sascha, this patch applies on top of some other patches that I picked up 
from the list. For reference, my complete current patch queue is at 
http://www.open-technology.de/download/20090415/

 arch/arm/mach-mx3/pcm037.c                 |   80 ++++++++++++++++++++++++++++
 arch/arm/plat-mxc/include/mach/iomux-mx3.h |   12 ++++
 2 files changed, 92 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index 00ce1eb..f5a2c3d 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -31,6 +31,7 @@
 #include <linux/delay.h>
 #include <linux/spi/spi.h>
 #include <linux/irq.h>
+#include <linux/fsl_devices.h>
 
 #include <media/soc_camera.h>
 
@@ -152,6 +153,80 @@ static struct resource pcm037_flash_resource = {
 	.flags	= IORESOURCE_MEM,
 };
 
+static int usbotg_pins[] = {
+	MX31_PIN_USBOTG_DATA0__DATA0,
+	MX31_PIN_USBOTG_DATA1__DATA1,
+	MX31_PIN_USBOTG_DATA2__DATA2,
+	MX31_PIN_USBOTG_DATA3__DATA3,
+	MX31_PIN_USBOTG_DATA4__DATA4,
+	MX31_PIN_USBOTG_DATA5__DATA5,
+	MX31_PIN_USBOTG_DATA6__DATA6,
+	MX31_PIN_USBOTG_DATA7__DATA7,
+	MX31_PIN_USBOTG_CLK__CLK,
+	MX31_PIN_USBOTG_DIR__DIR,
+	MX31_PIN_USBOTG_NXT__NXT,
+	MX31_PIN_USBOTG_STP__STP,
+};
+
+/* USB OTG HS port */
+static int gpio_usbotg_hs_active(void)
+{
+	int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
+					ARRAY_SIZE(usbotg_pins), "usbotg");
+
+	if (ret < 0) {
+		printk(KERN_ERR "Cannot set up OTG pins\n");
+		return ret;
+	}
+
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+	mxc_iomux_set_pad(MX31_PIN_USBOTG_STP,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+
+	return 0;
+}
+
+/* OTG config */
+static struct fsl_usb2_platform_data usb_data = {
+	.operating_mode	= FSL_USB2_DR_DEVICE,
+	.phy_mode	= FSL_USB2_PHY_ULPI,
+};
+
+static struct resource otg_resources[] = {
+	{
+		.start = OTG_BASE_ADDR,
+		.end   = OTG_BASE_ADDR + 0x1ff,
+		.flags = IORESOURCE_MEM,
+	}, {
+		.start = MXC_INT_USB3,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static u64 udc_dmamask = DMA_BIT_MASK(32);
+
+/* OTG gadget device */
+static struct platform_device otg_udc_device = {
+	.name = "fsl-usb2-udc",
+	.id   = -1,
+	.dev  = {
+		.dma_mask          = &udc_dmamask,
+		.coherent_dma_mask = 0xffffffff,
+		.platform_data     = &usb_data,
+	},
+	.resource = otg_resources,
+	.num_resources = ARRAY_SIZE(otg_resources),
+};
+
 static struct platform_device pcm037_flash = {
 	.name	= "physmap-flash",
 	.id	= 0,
@@ -347,6 +422,7 @@ static struct platform_device *devices[] __initdata = {
 	&pcm037_flash,
 	&pcm037_eth,
 	&pcm037_sram_device,
+	&otg_udc_device,
 #if defined(CONFIG_I2C_IMX) || defined(CONFIG_I2C_IMX_MODULE)
 	&pcm037_camera,
 #endif
@@ -384,6 +460,10 @@ static struct mx3fb_platform_data mx3fb_pdata = {
 	.num_modes	= ARRAY_SIZE(fb_modedb),
 };
 
+#if defined(CONFIG_USB_GADGET_FSL_USB2)
+late_initcall(gpio_usbotg_hs_active);
+#endif
+
 /*
  * Board specific initialization.
  */
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index 43d4199..c44d090 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -624,6 +624,18 @@ enum iomux_pins {
 #define MX31_PIN_GPIO3_0__GPIO3_0	IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_GPIO3_1__GPIO3_1	IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO)
 #define MX31_PIN_TXD2__GPIO1_28		IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO)
+#define MX31_PIN_USBOTG_DATA0__DATA0	IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA1__DATA1	IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA2__DATA2	IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA3__DATA3	IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA4__DATA4	IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA5__DATA5	IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA6__DATA6	IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DATA7__DATA7	IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_CLK__CLK	IOMUX_MODE(MX31_PIN_USBOTG_CLK,   IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_DIR__DIR	IOMUX_MODE(MX31_PIN_USBOTG_DIR,   IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_NXT__NXT	IOMUX_MODE(MX31_PIN_USBOTG_NXT,   IOMUX_CONFIG_FUNC)
+#define MX31_PIN_USBOTG_STP__STP	IOMUX_MODE(MX31_PIN_USBOTG_STP,   IOMUX_CONFIG_FUNC)
 
 /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0
  * cspi1_ss1*/
-- 
1.5.4

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