Hi Andy, Andy Shevchenko 於 2018/1/22 下午 10:55 寫道:
On Mon, Jan 22, 2018 at 9:58 AM, Ji-Ze Hong (Peter Hong) <hpeter@xxxxxxxxx> wrote:The F81232 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates can be up to 1.5Mbits with 24MHz. F81232 Clock registers (106h) Bit1-0: Clock source selector 00: 1.846MHz. 01: 18.46MHz. 10: 24MHz. 11: 14.77MHz.Hmm... Why not to provide a proper clk driver (based on table variant of clk-divider) and use it here?
It seems too complex to use clock framework in this driver. What do you think about this, Johan ? Thanks -- With Best Regards, Peter Hong -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
