Re: [patch 2.6.29 1/3] musb: bugfixes for multi-packet TXDMA support (v2)

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Hello.

David Brownell wrote:

You know, you really *could* try to provide decent patch
descriptions yourself.  It's not like I haven't made
clear that'd be preferable.

   I've already had negative experience with that -- being ignored.

Not being ignored if you do a decent job providing patch
descriptions...

   So my previous attempt was indecent? :-)

Doing that would waste a lot less time than what you're
doing ... and would be a lot less annoying all around.

   OK, do you want me to resend this patch?

Just the patch description.  I'll send you the current
version of the patch off-list.

   OK, does this one look decent?

<<
We'd really prefer to use Tx DMA mode 1 for all multi-packet DMA
transfers -- that's one interrupt on DMA completion instead of
one per packet.

There is an important issue with such transfers, especially on
the host side:  we must defer URB completion callback until the
FIFO empties.  Else we not only report them too soon, but we
may clobber a packet still in the FIFO when writing data for
the next URB (losing data).

The Inventra DMA support uses DMA mode 1 but it ignores that
issue in at least one case: when the last packet is full-size.
The CPPI DMA drive still uses DMA mode 0 and does not call musb_dma_completion() on the host Tx path at all; still, this
scheme fails too because of the stale "packet sent" interrupts
(with TXPKTRDY set again) often arriving after DMA has already
completed which results in a premature URB completion anyway...

Since this issue is common to almost all DMA contollers, I'm
solving it in a generic way, by adding a sort of the "interrupt
filter" into musb_host_tx(), catching the cases where a DMA
completion interrupt is too early for completing URB.  When
such interrupt happens and DMA mode 1 is active, that filter
resets to mode 0 (it *tries* to do that after clearing the
DMAENAB bit as the programming guide forbids clearing DMAMODE
bit before or at the same cycle as that one); it then checks
if the FIFO still contains data and defers the URB completion
until the next (now enabled) "packet sent" interrupt.  The
related filtering logic in the Inventra and CPPI drivers can
now be removed.

Since it should be competely safe now to use the DMA mode 1 for
the host side transfers with the CPPI DMA controller, set it in cppi_host_txdma_start() (that I renamed as it's used not only in
the CPPI case).
>>

WBR, Sergei
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