Re: [PATCH v2] xhci: Bad Ethernet performance plugged in ASM1042A host

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Hi,

Jiahau Chang <jiahau@xxxxxxxxx> writes:
> v2 : fix coding format

this doesn't need to be in the commit log. You should place such notes
after the tearline (---) below

> When USB Ethernet is plugged in ASMEDIA ASM1042A xHCI host, bad
> performance was manifesting in Web browser use (like download
> large file such as ISO image). It is known limitation of
> ASM1042A that is not compatible with driver scheduling,
> As a workaround we can modify flow control handling of ASM1042A.
>
> Signed-off-by: Jiahau Chang <Lars_chang@xxxxxxxxxxxxxx>
> ---
>  drivers/usb/host/pci-quirks.c | 62 +++++++++++++++++++++++++++++++++++++++++++
>  drivers/usb/host/pci-quirks.h |  1 +
>  drivers/usb/host/xhci-pci.c   |  5 ++++
>  drivers/usb/host/xhci.c       |  3 +++
>  drivers/usb/host/xhci.h       |  1 +
>  5 files changed, 72 insertions(+)
>
> diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
> index a9a1e4c..bdeaf75 100644
> --- a/drivers/usb/host/pci-quirks.c
> +++ b/drivers/usb/host/pci-quirks.c
> @@ -77,6 +77,12 @@
>  #define USB_INTEL_USB3_PSSEN   0xD8
>  #define USB_INTEL_USB3PRM      0xDC
>  
> +/*ASMEDIA quirk use*/
> +#define ASMT_DATA_WRITE0_REG	0xF8
> +#define ASMT_DATA_WRITE1_REG	0xFC
> +#define ASMT_CONTROL_REG	0xE0
> +#define ASMT_CONTROL_WRITE_BIT	0x02
> +
>  /*
>   * amd_chipset_gen values represent AMD different chipset generations
>   */
> @@ -412,6 +418,62 @@ void usb_amd_quirk_pll_disable(void)
>  }
>  EXPORT_SYMBOL_GPL(usb_amd_quirk_pll_disable);
>  
> +void usb_asmedia_modifyflowcontrol(struct pci_dev *pdev)
> +{
> +	u32 value_low, value_high;
> +	unsigned char value;
> +	unsigned long wait_time_count;
> +
> +	wait_time_count = 1000;
> +	while (wait_time_count) {
> +		pci_read_config_byte(pdev, ASMT_CONTROL_REG, &value);
> +		if (value == 0xff) {
> +			dev_dbg(&pdev->dev, "%s: wait_write_ready IO_ERROR, value=%x\n",
> +				__func__, value);
> +			goto err_exit;
> +		} else if ((value & ASMT_CONTROL_WRITE_BIT) == 0) {
> +			break;
> +		}
> +		wait_time_count--;
> +		udelay(50);
> +	}
> +	if (wait_time_count == 0) {
> +		dev_dbg(&pdev->dev, "%s: wait_write_ready timeout\n",
> +			__func__);
> +		goto err_exit;
> +	}
> +	value_low = 0x00010423;
> +	value_high = 0xFA30;

sorry, no magic constants

> +	pci_write_config_dword(pdev, ASMT_DATA_WRITE0_REG, value_low);
> +	pci_write_config_dword(pdev, ASMT_DATA_WRITE1_REG, value_high);
> +	pci_write_config_byte(pdev, ASMT_CONTROL_REG, ASMT_CONTROL_WRITE_BIT);
> +	wait_time_count = 1000;
> +	while (wait_time_count) {
> +		pci_read_config_byte(pdev, ASMT_CONTROL_REG, &value);
> +		if (value == 0xff) {
> +			dev_dbg(&pdev->dev, "%s: wait_write_ready IO_ERROR, value=%x\n",
> +				__func__, value);
> +		goto err_exit;

indentation

> +		} else if ((value & ASMT_CONTROL_WRITE_BIT) == 0) {
> +			break;
> +		}
> +		wait_time_count--;
> +		udelay(50);
> +	}
> +	if (wait_time_count == 0) {
> +		dev_dbg(&pdev->dev, "%s: wait_write_ready timeout\n",
> +			__func__);
> +		goto err_exit;
> +	}
> +	pci_write_config_dword(pdev, ASMT_DATA_WRITE0_REG, 0xBA);
> +	pci_write_config_dword(pdev, ASMT_DATA_WRITE1_REG, 0);

likewise

> diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
> index 73a28a9..ed58f87 100644
> --- a/drivers/usb/host/xhci.h
> +++ b/drivers/usb/host/xhci.h
> @@ -1819,6 +1819,7 @@ struct xhci_hcd {
>  /* For controller with a broken Port Disable implementation */
>  #define XHCI_BROKEN_PORT_PED	(1 << 25)
>  #define XHCI_LIMIT_ENDPOINT_INTERVAL_7	(1 << 26)
> +#define XHCI_ASMEDIA_MODIFY_FLOWCONTROL	(1<<27)

spaces around <<

-- 
balbi

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