Hi, Mathias Nyman <mathias.nyman@xxxxxxxxxxxxxxx> writes: > On 30.12.2016 14:01, Felipe Balbi wrote: >> >> Hi Mathias, >> >> So the problem I found with v4.10-rc1 doesn't appear to be a >> regression. I can't, however, trigger it with Broadwell, only Skylake >> and Kabylake. >> >> According to tracepoints, our Reset Device Command sometimes completes >> with "Context State Error", which tells us that we're issuing Reset >> Device Command when we shouldn't. > > This could happen if reset device is issued twice, > > xhci reset device command only works for slots in Addressed or > Configured states. Reset device sets the slot to "Defult" state. > > If the slot is already in Default state when a reset device command > is issued xHC will return a "Context State Error" yeah, I also confirmed that USB Spec itself has no restriction in that regard. Meaning that Bus Reset is valid from Default too, so this is an xHCI peculiarity. Patch sent, thanks. The problem of the broken USB headset is still there, however. What I see is that a control message to the headset times out. See the snippet below: > <idle>-0 [002] d.h2 34.570372: xhci_handle_command: CMD: Stop Ring Command: slot 22 sp 0 ep 1 flags C slot state configured We stop the ring. > <idle>-0 [002] d.h2 34.570374: xhci_dbg_cancel_urb: Removing canceled TD starting at 0x1be118790 (dma). > <idle>-0 [002] d.h2 34.570377: xhci_dbg_cancel_urb: Finding endpoint context > <idle>-0 [002] d.h2 34.570379: xhci_dbg_cancel_urb: Cycle state = 0x1 > <idle>-0 [002] d.h2 34.570380: xhci_dbg_cancel_urb: New dequeue segment = ffff8801be51d340 (virtual) > <idle>-0 [002] d.h2 34.570382: xhci_dbg_cancel_urb: New dequeue pointer = 0x1be1187c0 (DMA) > <idle>-0 [002] d.h2 34.570384: xhci_dbg_cancel_urb: Set TR Deq Ptr cmd, new deq seg = ffff8801be51d340 (0x1be118000 dma), new deq ptr = ffff8801be1187c0 (0x1be1187c0 dma), new cycle = 1 > <idle>-0 [002] d.h2 34.570407: xhci_queue_trb: CMD: Set TR Dequeue Pointer Command: deq 00000001be1187c1 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] dNh1 34.570416: xhci_urb_giveback: ep0out-control: urb ffff8801bb8aa480 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00000200 >device-reset-2777 [002] .... 34.570421: xhci_urb_enqueue: ep0out-control: urb ffff8801bb8aa480 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00110200 > <idle>-0 [003] d.h2 34.570422: xhci_handle_event: EVENT: TRB 00000001be035940 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [003] d.h2 34.570422: xhci_handle_command: CMD: Set TR Dequeue Pointer Command: deq 00000001be1187c1 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [003] d.h2 34.570423: xhci_dbg_cancel_urb: Successful Set TR Deq Ptr cmd, deq = @1be1187c0 >device-reset-2777 [002] d..1 34.570426: xhci_queue_trb: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:c slot state configured >device-reset-2777 [002] d..1 34.570426: xhci_queue_trb: CTRL: Buffer 00000001bd199280 length 111 TD size 0 intr 0 type 'Data Stage' flags b:i:i:c:s:I:e:C slot state configured >device-reset-2777 [002] d..1 34.570426: xhci_queue_trb: CTRL: Buffer 0000000000000000 length 0 TD size 0 intr 0 type 'Status Stage' flags b:i:I:c:s:i:e:C slot state configured we queue several TRBs. After queueing them, we unconditionally call giveback_first_trb() which unconditionally calls xhci_ring_ep_doorbell(). So the ring is definitely restarted. > <idle>-0 [002] d.h2 34.570514: xhci_handle_event: EVENT: TRB 00000001be1187c0 status 'Stall Error' len 8 slot 22 ep 1 type 'Transfer Event' flags e:c slot state reserved we get Stall Error... and continue getting Stall errors until our control transfer, supposedly, times out > <idle>-0 [002] d.h2 34.570515: xhci_handle_transfer: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:C slot state configured > <idle>-0 [002] d.h2 34.570516: xhci_queue_trb: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.570516: xhci_dbg_reset_ep: Cleaning up stalled endpoint ring > <idle>-0 [002] d.h2 34.570517: xhci_dbg_cancel_urb: Finding endpoint context > <idle>-0 [002] d.h2 34.570517: xhci_dbg_cancel_urb: Cycle state = 0x1 > <idle>-0 [002] d.h2 34.570517: xhci_dbg_cancel_urb: New dequeue segment = ffff8801be51d340 (virtual) > <idle>-0 [002] d.h2 34.570518: xhci_dbg_cancel_urb: New dequeue pointer = 0x1be1187f0 (DMA) > <idle>-0 [002] d.h2 34.570518: xhci_dbg_reset_ep: Queueing new dequeue state > <idle>-0 [002] d.h2 34.570518: xhci_dbg_cancel_urb: Set TR Deq Ptr cmd, new deq seg = ffff8801be51d340 (0x1be118000 dma), new deq ptr = ffff8801be1187f0 (0x1be1187f0 dma), new cycle = 1 > <idle>-0 [002] d.h2 34.570519: xhci_queue_trb: CMD: Set TR Dequeue Pointer Command: deq 00000001be1187f1 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] dNh1 34.570526: xhci_urb_giveback: ep0out-control: urb ffff8801bb8aa480 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00000200 >device-reset-2777 [002] .... 34.570530: xhci_urb_enqueue: ep0out-control: urb ffff8801bb8aa480 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00110200 >device-reset-2777 [002] d..1 34.570530: xhci_queue_trb: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:c slot state configured >device-reset-2777 [002] d..1 34.570530: xhci_queue_trb: CTRL: Buffer 00000001bd199280 length 111 TD size 0 intr 0 type 'Data Stage' flags b:i:i:c:s:I:e:C slot state configured >device-reset-2777 [002] d..1 34.570530: xhci_queue_trb: CTRL: Buffer 0000000000000000 length 0 TD size 0 intr 0 type 'Status Stage' flags b:i:I:c:s:i:e:C slot state configured > <idle>-0 [002] d.h2 34.570561: xhci_handle_event: EVENT: TRB 00000001be035950 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.570562: xhci_handle_command: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.570562: xhci_dbg_reset_ep: Ignoring reset ep completion code of 1 > <idle>-0 [002] d.h2 34.570563: xhci_handle_event: EVENT: TRB 00000001be035960 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.570563: xhci_handle_command: CMD: Set TR Dequeue Pointer Command: deq 00000001be1187f1 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.570564: xhci_dbg_cancel_urb: Successful Set TR Deq Ptr cmd, deq = @1be1187f0 > <idle>-0 [002] d.h2 34.570669: xhci_handle_event: EVENT: TRB 00000001be1187f0 status 'Stall Error' len 8 slot 22 ep 1 type 'Transfer Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.570670: xhci_handle_transfer: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:C slot state configured > <idle>-0 [002] d.h2 34.570670: xhci_queue_trb: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.570670: xhci_dbg_reset_ep: Cleaning up stalled endpoint ring > <idle>-0 [002] d.h2 34.570670: xhci_dbg_cancel_urb: Finding endpoint context > <idle>-0 [002] d.h2 34.570671: xhci_dbg_cancel_urb: Cycle state = 0x1 > <idle>-0 [002] d.h2 34.570671: xhci_dbg_cancel_urb: New dequeue segment = ffff8801be51d340 (virtual) > <idle>-0 [002] d.h2 34.570672: xhci_dbg_cancel_urb: New dequeue pointer = 0x1be118820 (DMA) > <idle>-0 [002] d.h2 34.570672: xhci_dbg_reset_ep: Queueing new dequeue state > <idle>-0 [002] d.h2 34.570672: xhci_dbg_cancel_urb: Set TR Deq Ptr cmd, new deq seg = ffff8801be51d340 (0x1be118000 dma), new deq ptr = ffff8801be118820 (0x1be118820 dma), new cycle = 1 > <idle>-0 [002] d.h2 34.570673: xhci_queue_trb: CMD: Set TR Dequeue Pointer Command: deq 00000001be118821 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] dNh1 34.570675: xhci_urb_giveback: ep0out-control: urb ffff8801bb8aa480 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00000200 >device-reset-2777 [002] .... 34.570678: xhci_urb_enqueue: ep0out-control: urb ffff8801bb8aa480 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00110200 >device-reset-2777 [002] d..1 34.570679: xhci_queue_trb: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:c slot state configured >device-reset-2777 [002] d..1 34.570679: xhci_queue_trb: CTRL: Buffer 00000001bd199280 length 111 TD size 0 intr 0 type 'Data Stage' flags b:i:i:c:s:I:e:C slot state configured >device-reset-2777 [002] d..1 34.570679: xhci_queue_trb: CTRL: Buffer 0000000000000000 length 0 TD size 0 intr 0 type 'Status Stage' flags b:i:I:c:s:i:e:C slot state configured > <idle>-0 [002] d.h2 34.570716: xhci_handle_event: EVENT: TRB 00000001be035970 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.570717: xhci_handle_command: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.570717: xhci_dbg_reset_ep: Ignoring reset ep completion code of 1 > <idle>-0 [002] d.h2 34.570718: xhci_handle_event: EVENT: TRB 00000001be035980 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.570718: xhci_handle_command: CMD: Set TR Dequeue Pointer Command: deq 00000001be118821 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.570718: xhci_dbg_cancel_urb: Successful Set TR Deq Ptr cmd, deq = @1be118820 > <idle>-0 [002] d.h2 34.570830: xhci_handle_event: EVENT: TRB 00000001be118820 status 'Stall Error' len 8 slot 22 ep 1 type 'Transfer Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.570830: xhci_handle_transfer: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:C slot state configured > <idle>-0 [002] d.h2 34.570830: xhci_queue_trb: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.570831: xhci_dbg_reset_ep: Cleaning up stalled endpoint ring > <idle>-0 [002] d.h2 34.570831: xhci_dbg_cancel_urb: Finding endpoint context > <idle>-0 [002] d.h2 34.570831: xhci_dbg_cancel_urb: Cycle state = 0x1 > <idle>-0 [002] d.h2 34.570832: xhci_dbg_cancel_urb: New dequeue segment = ffff8801be51d340 (virtual) > <idle>-0 [002] d.h2 34.570832: xhci_dbg_cancel_urb: New dequeue pointer = 0x1be118850 (DMA) > <idle>-0 [002] d.h2 34.570832: xhci_dbg_reset_ep: Queueing new dequeue state > <idle>-0 [002] d.h2 34.570832: xhci_dbg_cancel_urb: Set TR Deq Ptr cmd, new deq seg = ffff8801be51d340 (0x1be118000 dma), new deq ptr = ffff8801be118850 (0x1be118850 dma), new cycle = 1 > <idle>-0 [002] d.h2 34.570833: xhci_queue_trb: CMD: Set TR Dequeue Pointer Command: deq 00000001be118851 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] dNh1 34.570835: xhci_urb_giveback: ep0out-control: urb ffff8801bb8aa480 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00000200 > <idle>-0 [002] d.h2 34.570877: xhci_handle_event: EVENT: TRB 00000001be035990 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.570877: xhci_handle_command: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.570878: xhci_dbg_reset_ep: Ignoring reset ep completion code of 1 > <idle>-0 [002] d.h2 34.570878: xhci_handle_event: EVENT: TRB 00000001be0359a0 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.570878: xhci_handle_command: CMD: Set TR Dequeue Pointer Command: deq 00000001be118851 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.570879: xhci_dbg_cancel_urb: Successful Set TR Deq Ptr cmd, deq = @1be118850 >device-reset-2777 [002] .... 34.592591: xhci_urb_enqueue: ep0out-control: urb ffff8801bb8aa480 pipe 2147488256 slot 22 length 0/0 sgs 0/0 stream 0 flags 00100000 >device-reset-2777 [002] d..1 34.592592: xhci_queue_trb: CTRL: bRequestType 21 bRequest 0a wValue 0000 wIndex 0003 wLength 0 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:c slot state configured >device-reset-2777 [002] d..1 34.592592: xhci_queue_trb: CTRL: Buffer 0000000000000000 length 0 TD size 0 intr 0 type 'Status Stage' flags b:i:I:c:s:i:e:C slot state configured > <idle>-0 [000] d.h2 34.592708: xhci_handle_event: EVENT: TRB 00000001be118850 status 'Stall Error' len 8 slot 22 ep 1 type 'Transfer Event' flags e:c slot state reserved > <idle>-0 [000] d.h2 34.592709: xhci_handle_transfer: CTRL: bRequestType 21 bRequest 0a wValue 0000 wIndex 0003 wLength 0 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:C slot state configured > <idle>-0 [000] d.h2 34.592711: xhci_queue_trb: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [000] d.h2 34.592716: xhci_dbg_reset_ep: Cleaning up stalled endpoint ring > <idle>-0 [000] d.h2 34.592721: xhci_dbg_cancel_urb: Finding endpoint context > <idle>-0 [000] d.h2 34.592721: xhci_dbg_cancel_urb: Cycle state = 0x1 > <idle>-0 [000] d.h2 34.592722: xhci_dbg_cancel_urb: New dequeue segment = ffff8801be51d340 (virtual) > <idle>-0 [000] d.h2 34.592723: xhci_dbg_cancel_urb: New dequeue pointer = 0x1be118870 (DMA) > <idle>-0 [000] d.h2 34.592723: xhci_dbg_reset_ep: Queueing new dequeue state > <idle>-0 [000] d.h2 34.592724: xhci_dbg_cancel_urb: Set TR Deq Ptr cmd, new deq seg = ffff8801be51d340 (0x1be118000 dma), new deq ptr = ffff8801be118870 (0x1be118870 dma), new cycle = 1 > <idle>-0 [000] d.h2 34.592726: xhci_queue_trb: CMD: Set TR Dequeue Pointer Command: deq 00000001be118871 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [000] dNh1 34.592737: xhci_urb_giveback: ep0out-control: urb ffff8801bb8aa480 pipe 2147488256 slot 22 length 0/0 sgs 0/0 stream 0 flags 00000000 > <idle>-0 [000] dNh2 34.592737: xhci_handle_event: EVENT: TRB 00000001be0359b0 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [000] dNh2 34.592738: xhci_handle_command: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [000] dNh2 34.592738: xhci_dbg_reset_ep: Ignoring reset ep completion code of 1 >device-reset-2777 [000] .... 34.592746: xhci_urb_enqueue: ep0out-control: urb ffff8801bd1b2d80 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00110200 >device-reset-2777 [000] d..1 34.592747: xhci_queue_trb: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:c slot state configured >device-reset-2777 [000] d..1 34.592747: xhci_queue_trb: CTRL: Buffer 00000001bd199180 length 111 TD size 0 intr 0 type 'Data Stage' flags b:i:i:c:s:I:e:C slot state configured >device-reset-2777 [000] d..1 34.592747: xhci_queue_trb: CTRL: Buffer 0000000000000000 length 0 TD size 0 intr 0 type 'Status Stage' flags b:i:I:c:s:i:e:C slot state configured > <idle>-0 [003] d.h2 34.592749: xhci_handle_event: EVENT: TRB 00000001be0359c0 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [003] d.h2 34.592750: xhci_handle_command: CMD: Set TR Dequeue Pointer Command: deq 00000001be118871 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [003] d.h2 34.592751: xhci_dbg_cancel_urb: Successful Set TR Deq Ptr cmd, deq = @1be118870 > <idle>-0 [000] d.h2 34.592858: xhci_handle_event: EVENT: TRB 00000001be118870 status 'Stall Error' len 8 slot 22 ep 1 type 'Transfer Event' flags e:c slot state reserved > <idle>-0 [000] d.h2 34.592859: xhci_handle_transfer: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:C slot state configured > <idle>-0 [000] d.h2 34.592860: xhci_queue_trb: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [000] d.h2 34.592861: xhci_dbg_reset_ep: Cleaning up stalled endpoint ring > <idle>-0 [000] d.h2 34.592861: xhci_dbg_cancel_urb: Finding endpoint context > <idle>-0 [000] d.h2 34.592862: xhci_dbg_cancel_urb: Cycle state = 0x1 > <idle>-0 [000] d.h2 34.592862: xhci_dbg_cancel_urb: New dequeue segment = ffff8801be51d340 (virtual) > <idle>-0 [000] d.h2 34.592863: xhci_dbg_cancel_urb: New dequeue pointer = 0x1be1188a0 (DMA) > <idle>-0 [000] d.h2 34.592864: xhci_dbg_reset_ep: Queueing new dequeue state > <idle>-0 [000] d.h2 34.592864: xhci_dbg_cancel_urb: Set TR Deq Ptr cmd, new deq seg = ffff8801be51d340 (0x1be118000 dma), new deq ptr = ffff8801be1188a0 (0x1be1188a0 dma), new cycle = 1 > <idle>-0 [000] d.h2 34.592866: xhci_queue_trb: CMD: Set TR Dequeue Pointer Command: deq 00000001be1188a1 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [000] dNh1 34.592874: xhci_urb_giveback: ep0out-control: urb ffff8801bd1b2d80 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00000200 >device-reset-2777 [000] .... 34.592880: xhci_urb_enqueue: ep0out-control: urb ffff8801bd1b2d80 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00110200 >device-reset-2777 [000] d..1 34.592880: xhci_queue_trb: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:c slot state configured >device-reset-2777 [000] d..1 34.592881: xhci_queue_trb: CTRL: Buffer 00000001bd199180 length 111 TD size 0 intr 0 type 'Data Stage' flags b:i:i:c:s:I:e:C slot state configured >device-reset-2777 [000] d..1 34.592881: xhci_queue_trb: CTRL: Buffer 0000000000000000 length 0 TD size 0 intr 0 type 'Status Stage' flags b:i:I:c:s:i:e:C slot state configured > <idle>-0 [003] d.h2 34.592906: xhci_handle_event: EVENT: TRB 00000001be0359d0 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [003] d.h2 34.592906: xhci_handle_command: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [003] d.h2 34.592907: xhci_dbg_reset_ep: Ignoring reset ep completion code of 1 > <idle>-0 [003] d.h2 34.592909: xhci_handle_event: EVENT: TRB 00000001be0359e0 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [003] d.h2 34.592909: xhci_handle_command: CMD: Set TR Dequeue Pointer Command: deq 00000001be1188a1 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [003] d.h2 34.592909: xhci_dbg_cancel_urb: Successful Set TR Deq Ptr cmd, deq = @1be1188a0 > <idle>-0 [002] d.h2 34.593022: xhci_handle_event: EVENT: TRB 00000001be1188a0 status 'Stall Error' len 8 slot 22 ep 1 type 'Transfer Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.593023: xhci_handle_transfer: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:C slot state configured > <idle>-0 [002] d.h2 34.593024: xhci_queue_trb: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.593025: xhci_dbg_reset_ep: Cleaning up stalled endpoint ring > <idle>-0 [002] d.h2 34.593025: xhci_dbg_cancel_urb: Finding endpoint context > <idle>-0 [002] d.h2 34.593026: xhci_dbg_cancel_urb: Cycle state = 0x1 > <idle>-0 [002] d.h2 34.593026: xhci_dbg_cancel_urb: New dequeue segment = ffff8801be51d340 (virtual) > <idle>-0 [002] d.h2 34.593027: xhci_dbg_cancel_urb: New dequeue pointer = 0x1be1188d0 (DMA) > <idle>-0 [002] d.h2 34.593028: xhci_dbg_reset_ep: Queueing new dequeue state > <idle>-0 [002] d.h2 34.593028: xhci_dbg_cancel_urb: Set TR Deq Ptr cmd, new deq seg = ffff8801be51d340 (0x1be118000 dma), new deq ptr = ffff8801be1188d0 (0x1be1188d0 dma), new cycle = 1 > <idle>-0 [002] d.h2 34.593030: xhci_queue_trb: CMD: Set TR Dequeue Pointer Command: deq 00000001be1188d1 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] dNh1 34.593039: xhci_urb_giveback: ep0out-control: urb ffff8801bd1b2d80 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00000200 > <idle>-0 [002] dNh2 34.593039: xhci_handle_event: EVENT: TRB 00000001be0359f0 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [002] dNh2 34.593040: xhci_handle_command: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] dNh2 34.593041: xhci_dbg_reset_ep: Ignoring reset ep completion code of 1 >device-reset-2777 [002] .... 34.593047: xhci_urb_enqueue: ep0out-control: urb ffff8801bb8aa840 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00110200 >device-reset-2777 [002] d..1 34.593048: xhci_queue_trb: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:c slot state configured >device-reset-2777 [002] d..1 34.593048: xhci_queue_trb: CTRL: Buffer 00000001bd199180 length 111 TD size 0 intr 0 type 'Data Stage' flags b:i:i:c:s:I:e:C slot state configured >device-reset-2777 [002] d..1 34.593048: xhci_queue_trb: CTRL: Buffer 0000000000000000 length 0 TD size 0 intr 0 type 'Status Stage' flags b:i:I:c:s:i:e:C slot state configured > <idle>-0 [002] d.h2 34.593069: xhci_handle_event: EVENT: TRB 00000001be035a00 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.593069: xhci_handle_command: CMD: Set TR Dequeue Pointer Command: deq 00000001be1188d1 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.593070: xhci_dbg_cancel_urb: Successful Set TR Deq Ptr cmd, deq = @1be1188d0 > <idle>-0 [000] d.h2 34.593162: xhci_handle_event: EVENT: TRB 00000001be1188d0 status 'Stall Error' len 8 slot 22 ep 1 type 'Transfer Event' flags e:c slot state reserved > <idle>-0 [000] d.h2 34.593163: xhci_handle_transfer: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:C slot state configured > <idle>-0 [000] d.h2 34.593164: xhci_queue_trb: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [000] d.h2 34.593166: xhci_dbg_reset_ep: Cleaning up stalled endpoint ring > <idle>-0 [000] d.h2 34.593166: xhci_dbg_cancel_urb: Finding endpoint context > <idle>-0 [000] d.h2 34.593167: xhci_dbg_cancel_urb: Cycle state = 0x1 > <idle>-0 [000] d.h2 34.593169: xhci_dbg_cancel_urb: New dequeue segment = ffff8801be51d340 (virtual) > <idle>-0 [000] d.h2 34.593171: xhci_dbg_cancel_urb: New dequeue pointer = 0x1be118900 (DMA) > <idle>-0 [000] d.h2 34.593172: xhci_dbg_reset_ep: Queueing new dequeue state > <idle>-0 [000] d.h2 34.593172: xhci_dbg_cancel_urb: Set TR Deq Ptr cmd, new deq seg = ffff8801be51d340 (0x1be118000 dma), new deq ptr = ffff8801be118900 (0x1be118900 dma), new cycle = 1 > <idle>-0 [000] d.h2 34.593173: xhci_queue_trb: CMD: Set TR Dequeue Pointer Command: deq 00000001be118901 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [000] dnh1 34.593183: xhci_urb_giveback: ep0out-control: urb ffff8801bb8aa840 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00000200 >device-reset-2777 [002] .... 34.593187: xhci_urb_enqueue: ep0out-control: urb ffff8801bb8aa840 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00110200 >device-reset-2777 [002] d..1 34.593188: xhci_queue_trb: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:c slot state configured >device-reset-2777 [002] d..1 34.593188: xhci_queue_trb: CTRL: Buffer 00000001bd199180 length 111 TD size 0 intr 0 type 'Data Stage' flags b:i:i:c:s:I:e:C slot state configured >device-reset-2777 [002] d..1 34.593188: xhci_queue_trb: CTRL: Buffer 0000000000000000 length 0 TD size 0 intr 0 type 'Status Stage' flags b:i:I:c:s:i:e:C slot state configured > <idle>-0 [002] d.h2 34.593209: xhci_handle_event: EVENT: TRB 00000001be035a10 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.593209: xhci_handle_command: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.593210: xhci_dbg_reset_ep: Ignoring reset ep completion code of 1 > <idle>-0 [002] d.h2 34.593211: xhci_handle_event: EVENT: TRB 00000001be035a20 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.593211: xhci_handle_command: CMD: Set TR Dequeue Pointer Command: deq 00000001be118901 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.593212: xhci_dbg_cancel_urb: Successful Set TR Deq Ptr cmd, deq = @1be118900 > <idle>-0 [002] d.h2 34.593318: xhci_handle_event: EVENT: TRB 00000001be118900 status 'Stall Error' len 8 slot 22 ep 1 type 'Transfer Event' flags e:c slot state reserved > <idle>-0 [002] d.h2 34.593319: xhci_handle_transfer: CTRL: bRequestType 81 bRequest 06 wValue 2200 wIndex 0003 wLength 111 length 8 TD size 0 intr 0 type 'Setup Stage' flags b:I:i:c:s:i:e:C slot state configured > <idle>-0 [002] d.h2 34.593319: xhci_queue_trb: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] d.h2 34.593320: xhci_dbg_reset_ep: Cleaning up stalled endpoint ring > <idle>-0 [002] d.h2 34.593320: xhci_dbg_cancel_urb: Finding endpoint context > <idle>-0 [002] d.h2 34.593321: xhci_dbg_cancel_urb: Cycle state = 0x1 > <idle>-0 [002] d.h2 34.593321: xhci_dbg_cancel_urb: New dequeue segment = ffff8801be51d340 (virtual) > <idle>-0 [002] d.h2 34.593322: xhci_dbg_cancel_urb: New dequeue pointer = 0x1be118930 (DMA) > <idle>-0 [002] d.h2 34.593322: xhci_dbg_reset_ep: Queueing new dequeue state > <idle>-0 [002] d.h2 34.593322: xhci_dbg_cancel_urb: Set TR Deq Ptr cmd, new deq seg = ffff8801be51d340 (0x1be118000 dma), new deq ptr = ffff8801be118930 (0x1be118930 dma), new cycle = 1 > <idle>-0 [002] d.h2 34.593323: xhci_queue_trb: CMD: Set TR Dequeue Pointer Command: deq 00000001be118931 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [002] dNh1 34.593331: xhci_urb_giveback: ep0out-control: urb ffff8801bb8aa840 pipe 2147488384 slot 22 length 0/111 sgs 0/0 stream 0 flags 00000200 > <idle>-0 [000] d.h2 34.593359: xhci_handle_event: EVENT: TRB 00000001be035a30 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [000] d.h2 34.593360: xhci_handle_command: CMD: Reset Endpoint Command: ctx 0000000000000000 slot 22 ep 1 flags C slot state configured > <idle>-0 [000] d.h2 34.593360: xhci_dbg_reset_ep: Ignoring reset ep completion code of 1 > <idle>-0 [000] d.h2 34.593361: xhci_handle_event: EVENT: TRB 00000001be035a40 status 'Success' len 0 slot 22 ep 0 type 'Command Completion Event' flags e:c slot state reserved > <idle>-0 [000] d.h2 34.593362: xhci_handle_command: CMD: Set TR Dequeue Pointer Command: deq 00000001be118931 stream 0 slot 22 ep 1 flags C slot state configured > <idle>-0 [000] d.h2 34.593362: xhci_dbg_cancel_urb: Successful Set TR Deq Ptr cmd, deq = @1be118930 > usb-storage-1204 [002] .... 36.232396: xhci_urb_enqueue: ep2out-bulk: urb ffff8801be31ce40 pipe 3221292288 slot 8 length 0/31 sgs 0/0 stream 0 flags 00000004 > usb-storage-1204 [002] d..1 36.232398: xhci_queue_trb: BULK: Buffer 00000001bd4e9000 length 31 TD size 0 intr 0 type 'Normal' flags b:i:I:c:s:i:e:c slot state configured > <idle>-0 [002] d.h2 36.232412: xhci_handle_event: EVENT: TRB 00000001bd4e3510 status 'Success' len 0 slot 8 ep 4 type 'Transfer Event' flags e:c slot state reserved -- balbi
Attachment:
signature.asc
Description: PGP signature
