Hello.
On 11/25/2016 06:24 AM, Changming Huang wrote:
The EHCI specification states the following in the SUSP bit description:
In the Suspend state, the port is senstive to resume detection.
Sensitive.
Note that the bit status does not change untile the port is suspended and
Until.
that there may be a delay in susupending a port if there is a transaction
Suspending.
currently in progress on the USB.
However, in NXP USBDR controller, the PORTSCx[SUSP] bit changes immediately
when the application sets it and not when the port is actually suspended.
So the application must wait for at least 10 milliseconds after a port
indicates that it is suspended, to make sure this port has entered
suspended state before initiating this port resume using the Force Port
Resume bit. This bit is for NXP controller, not EHCI compatible.
Signed-off-by: Changming Huang <jerry.huang@xxxxxxx>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@xxxxxxx>
[...]
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 74f62d6..81e2310 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -310,6 +310,13 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
}
spin_unlock_irq(&ehci->lock);
+ if (changed && ehci_has_fsl_susp_errata(ehci))
+ /* Wait for at least 10 millisecondes to ensure the controller
Milliseconds.
+ * enter the suspend status before initiating a port resume
+ * using the Fore Port Resume bit (Not-EHCI compatible).
Maybe force?
s/Not/non/ also.
+ */
+ usleep_range(10000, 20000);
+
if ((changed && ehci->has_tdi_phy_lpm) || fs_idle_delay) {
/*
* Wait for HCD to enter low-power mode or for the bus
[...]
@@ -703,10 +704,15 @@ struct ehci_tt {
#if defined(CONFIG_PPC_85xx)
/* Some Freescale processors have an erratum (USB A-005275) in which
* incoming packets get corrupted in HS mode
+ * Some Freescale processors have an erratum (USB A-005697) in which
+ * we need to wait for 10ms for bus to fo into suspend mode after
Fo?
[...]
MBR, Sergei
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