From: Mark Lord <mlord@xxxxxxxxx> Date: Thu, 24 Nov 2016 11:43:53 -0500 > So even if this were a platform memory coherency issue, one should > still never see ASCII data at the beginning of an rx buffer. I'm not so convinced, since this is the kind of random corruption one would expect to see when dealing with virtual caches that have aliasing or similar issues. Writes to address X that show up at address Y or not at all are precisely the signature of virtual cache aliasing problems. Is it a case of the chip writing to X but the cpu is still seeing stale data from a previous CPU store? For NFS the cpu is writing into the page cache, so we know that cpu side stores are where the ASCII text is coming from. Now is the r8152 buffer one that the USB host controller is DMA'ing into directly, or is it one that SWIOMMU or similar bounce buffering is copying into? In the latter case we are doing cpu stores into the area and the writes aren't coming from the device. -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
