On Wed, Oct 19, 2016 at 03:22:35PM +0200, Alexander Kurz wrote:
> Add usbphy and usbmisc nodes to the SOC DTS. fsl,imx53-usbmisc offers
> compatible support for the required usbmisc units 0 and 1.
> Also fix the clock source for the two usb cores according to the
> imx50 reference manual.
>
> Signed-off-by: Alexander Kurz <akurz@xxxxxxxx>
> ---
> arch/arm/boot/dts/imx50.dtsi | 29 +++++++++++++++++++++++++++--
> 1 file changed, 27 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx50.dtsi b/arch/arm/boot/dts/imx50.dtsi
> index 8fe8bee..75c4e27 100644
> --- a/arch/arm/boot/dts/imx50.dtsi
> +++ b/arch/arm/boot/dts/imx50.dtsi
> @@ -184,11 +184,27 @@
> };
> };
>
> + usbphy0: usbphy@0 {
> + compatible = "usb-nop-xceiv";
> + clocks = <&clks IMX5_CLK_USB_PHY1_GATE>;
> + clock-names = "main_clk";
> + status = "okay";
> + };
> +
> + usbphy1: usbphy@1 {
> + compatible = "usb-nop-xceiv";
> + clocks = <&clks IMX5_CLK_USB_PHY2_GATE>;
> + clock-names = "main_clk";
> + status = "okay";
> + };
> +
> usbotg: usb@53f80000 {
> compatible = "fsl,imx50-usb", "fsl,imx27-usb";
> reg = <0x53f80000 0x0200>;
> interrupts = <18>;
> - clocks = <&clks IMX5_CLK_USB_PHY1_GATE>;
> + clocks = <&clks IMX5_CLK_USBOH3_GATE>;
> + fsl,usbmisc = <&usbmisc 0>;
> + fsl,usbphy = <&usbphy0>;
> status = "disabled";
> };
>
> @@ -196,7 +212,9 @@
> compatible = "fsl,imx50-usb", "fsl,imx27-usb";
> reg = <0x53f80200 0x0200>;
> interrupts = <14>;
> - clocks = <&clks IMX5_CLK_USB_PHY2_GATE>;
> + clocks = <&clks IMX5_CLK_USBOH3_GATE>;
> + fsl,usbmisc = <&usbmisc 1>;
> + fsl,usbphy = <&usbphy1>;
> dr_mode = "host";
> status = "disabled";
> };
> @@ -333,6 +351,13 @@
> status = "disabled";
> };
>
> + usbmisc: usbmisc@53fc4800 {
> + #index-cells = <1>;
> + compatible = "fsl,imx53-usbmisc";
> + reg = <0x53fc4800 0x200>;
> + clocks = <&clks IMX5_CLK_USBOH3_GATE>;
> + };
> +
> src: src@53fd0000 {
> compatible = "fsl,imx50-src", "fsl,imx51-src";
> reg = <0x53fd0000 0x4000>;
Acked-by: Peter Chen <peter.chen@xxxxxxx>
--
Best Regards,
Peter Chen
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