[PATCH 1/1] ARM: imx53: configure imx for ULPI phy

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In order to use ULPI phy with usb host 2 and 3, we need to configure
controller register to enable ULPI features.

Signed-off-by: Fabien Lahoudere <fabien.lahoudere@xxxxxxxxxxxxxxx>
---
 drivers/usb/chipidea/ci_hdrc_imx.c |  5 +++
 drivers/usb/chipidea/ci_hdrc_imx.h |  1 +
 drivers/usb/chipidea/usbmisc_imx.c | 81 +++++++++++++++++++++++++++++++-------
 3 files changed, 72 insertions(+), 15 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
index 0991794..96c0e33 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.c
+++ b/drivers/usb/chipidea/ci_hdrc_imx.c
@@ -18,6 +18,7 @@
 #include <linux/pm_runtime.h>
 #include <linux/dma-mapping.h>
 #include <linux/usb/chipidea.h>
+#include <linux/usb/of.h>
 #include <linux/clk.h>
 
 #include "ci.h"
@@ -146,6 +147,10 @@ static struct imx_usbmisc_data *usbmisc_get_init_data(struct device *dev)
 	if (of_find_property(np, "external-vbus-divider", NULL))
 		data->evdo = 1;
 
+
+	if (of_usb_get_phy_mode(np) == USBPHY_INTERFACE_MODE_ULPI)
+		data->ulpi = 1;
+
 	return data;
 }
 
diff --git a/drivers/usb/chipidea/ci_hdrc_imx.h b/drivers/usb/chipidea/ci_hdrc_imx.h
index 409aa5ca8..d666c9f 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.h
+++ b/drivers/usb/chipidea/ci_hdrc_imx.h
@@ -19,6 +19,7 @@ struct imx_usbmisc_data {
 	unsigned int disable_oc:1; /* over current detect disabled */
 	unsigned int oc_polarity:1; /* over current polarity if oc enabled */
 	unsigned int evdo:1; /* set external vbus divider option */
+	unsigned int ulpi:1; /* connected to an ULPI phy */
 };
 
 int imx_usbmisc_init(struct imx_usbmisc_data *);
diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c
index 20d02a5..5472900 100644
--- a/drivers/usb/chipidea/usbmisc_imx.c
+++ b/drivers/usb/chipidea/usbmisc_imx.c
@@ -46,11 +46,20 @@
 
 #define MX53_USB_OTG_PHY_CTRL_0_OFFSET	0x08
 #define MX53_USB_OTG_PHY_CTRL_1_OFFSET	0x0c
+#define MX53_USB_CTRL_1_OFFSET	        0x10
+#define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2)
+#define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI BIT(2)
+#define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK (0x11 << 6)
+#define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI BIT(6)
 #define MX53_USB_UH2_CTRL_OFFSET	0x14
 #define MX53_USB_UH3_CTRL_OFFSET	0x18
 #define MX53_BM_OVER_CUR_DIS_H1		BIT(5)
 #define MX53_BM_OVER_CUR_DIS_OTG	BIT(8)
 #define MX53_BM_OVER_CUR_DIS_UHx	BIT(30)
+#define MX53_USB_CTRL_1_UH2_ULPI_EN	BIT(26)
+#define MX53_USB_CTRL_1_UH3_ULPI_EN	BIT(27)
+#define MX53_USB_UHx_CTRL_WAKE_UP_EN	BIT(7)
+#define MX53_USB_UHx_CTRL_ULPI_INT_EN	BIT(8)
 #define MX53_USB_PHYCTRL1_PLLDIV_MASK	0x3
 #define MX53_USB_PLL_DIV_24_MHZ		0x01
 
@@ -199,31 +208,73 @@ static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
 	val |= MX53_USB_PLL_DIV_24_MHZ;
 	writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
 
-	if (data->disable_oc) {
-		spin_lock_irqsave(&usbmisc->lock, flags);
-		switch (data->index) {
+	spin_lock_irqsave(&usbmisc->lock, flags);
+
+	switch (data->index) {
 		case 0:
-			reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
-			val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG;
+			if (data->disable_oc) {
+				reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
+				val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG;
+				if (reg && val)
+					writel(val, reg);
+			}
 			break;
 		case 1:
-			reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
-			val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1;
+			if (data->disable_oc) {
+				reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
+				val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1;
+				if (reg && val)
+					writel(val, reg);
+			}
 			break;
 		case 2:
-			reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
-			val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
+			if (data->ulpi) {
+				/* set USBH2 into ULPI-mode. */
+				reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
+				val = readl(reg) | MX53_USB_CTRL_1_UH2_ULPI_EN;
+				/* select ULPI clock */
+				val &= ~MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK;
+				val |= MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI;
+				writel(val, reg);
+				/* Set interrupt wake up enable */
+				reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
+				val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
+					| MX53_USB_UHx_CTRL_ULPI_INT_EN;
+				writel(val, reg);
+			}
+			if (data->disable_oc) {
+				reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
+				val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
+				if (reg && val)
+					writel(val, reg);
+			}
 			break;
 		case 3:
-			reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
-			val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
+			if (data->ulpi) {
+				/* set USBH3 into ULPI-mode. */
+				reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
+				val = readl(reg) | MX53_USB_CTRL_1_UH3_ULPI_EN;
+				/* select ULPI clock */
+				val &= ~MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK;
+				val |= MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI;
+				writel(val, reg);
+				/* Set interrupt wake up enable */
+				reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
+				val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
+					| MX53_USB_UHx_CTRL_ULPI_INT_EN;
+				writel(val, reg);
+			}
+			if (data->disable_oc) {
+				reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
+				val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
+				if (reg && val)
+					writel(val, reg);
+			}
 			break;
-		}
-		if (reg && val)
-			writel(val, reg);
-		spin_unlock_irqrestore(&usbmisc->lock, flags);
 	}
 
+	spin_unlock_irqrestore(&usbmisc->lock, flags);
+
 	return 0;
 }
 
-- 
2.1.4

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