On Thu, 2016-09-01 at 10:21 +0800, Lu Baolu wrote: > Hi Oliver, > > Thanks for review. > > On 08/31/2016 05:53 PM, Oliver Neukum wrote: > > On Mon, 2016-08-29 at 13:26 +0800, Lu Baolu wrote: > >> + /* > >> + * Memory barrier to ensure hardware sees the trbs > >> + * enqueued above. > >> + */ > >> + wmb(); > >> + if (cycle) > >> + trb->field[3] |= cpu_to_le32(cycle); > >> + else > >> + trb->field[3] &= cpu_to_le32(~TRB_CYCLE); > > And this manipulation you don't need the hardware to see? > > TRB is a shared memory block between CPU and DbC hardware. > TRB_CYCLE bit is the identifier of the owner. When CPU submits > a transfer block to device, it populates the TRB and toggles the > cycle bit in the end to let device handle it. > > Before toggling the cycle bit, driver must make sure 1) the > compiler should not reorder the write sequence, and 2) all > writes should be really take effect in memory instead of pending > in the caches. That's the reason I put a wmb() before toggling > the cycle bit. I see. The comment is a bit misleading. Sorry Oliver -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
