Hi Greg, On 06/18/2016 08:58 AM, Greg Kroah-Hartman wrote: > On Thu, Jun 16, 2016 at 08:27:41AM +0800, Lu Baolu wrote: >> Hi Greg, >> >> On 06/09/2016 10:39 AM, Lu Baolu wrote: >>> Hi Greg, >>> >>> On 06/08/2016 11:45 PM, Greg Kroah-Hartman wrote: >>>> On Wed, Jun 08, 2016 at 03:56:04PM +0800, Lu Baolu wrote: >>>>> Hi Greg, >>>>> >>>>> On 06/08/2016 12:45 PM, Greg Kroah-Hartman wrote: >>>>>> On Thu, Jun 02, 2016 at 09:37:28AM +0800, Lu Baolu wrote: >>>>>>> In some Intel platforms, a single usb port is shared between USB host >>>>>>> and device controllers. The shared port is under control of a switch >>>>>>> which is defined in the Intel vendor defined extended capability for >>>>>>> xHCI. >>>>>>> >>>>>>> This patch adds the support to detect and create the platform device >>>>>>> for the port mux switch. >>>>>> Why do you need a platform device for this? You do nothing with this >>>>>> device, why create it at all? >>>>> In this patch series, I have a generic framework for port mux devices >>>>> and two port mux drivers sitting on top the generic code. >>>>> >>>>> In this patch, I create a platform device for the real mux device in >>>>> Intel Cherry Trail or Broxton SOCs. In it's driver, I registered a mux >>>>> into the generic framework and handle the power management >>>>> things in driver's pm entries (otherwise, the system can't be waken >>>>> up from system suspend).:) >>>>> >>>>>> And why is it a platform device, isn't is really a PCI device? Why >>>>>> would you ever find a "platform" device below a PCI device? Don't abuse >>>>>> platform devices for things that aren't. It makes me want to delete >>>>>> that whole interface more and more... >>>>> Port mux devices are physical devices in Intel Cherry Trail and Broxton >>>>> SOCs. It doesn't sit on any PCIe bus. But it maps its registers in xHCI >>>>> space. OS kernel can enumerate it by looking up the xhci extended >>>>> capability list with a vendor specific capability ID. >>>> A physical device that maps registers into PCI space seems like a PCI >>>> device of some type to me :) >>>> >>>> Again, I hate platform devices for obvious reasons like this... >>>> >>> It's not PCI configure space, but xhci's io memory. XHCI spec reserves >>> a range in its extended capability list for vendor specific things. Intel's >>> platform leverages this for the port mux device register mapping. >>> It looks odd though. :) >> A gentle ping. :) > For what? This patchset is long gone from my queue for the other > various things that came up with it, what can I do with it now? I see now. Thanks for your reply. Best regards, Lu Baolu > >> This port mux is not a PCI device. It only leverages the vendor >> specific capability defined in xhci specification for enumeration. > It's still crap :) > > I don't know, and don't really remember the patch anymore anyway, > remember, I have the sort-term memory of a squirrel, you need repost > patches, with a proper changelog for me to be able to do anything... > > greg k-h > -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
