Ping.
On Tue, Aug 18, 2015 at 12:55 AM, Tomer Barletz <barletz@xxxxxxxxx> wrote:
> Signed-off-by: Tomer Barletz <barletz@xxxxxxxxx>
> ---
> drivers/usb/host/xhci-pci.c | 90 ++++++++++++++++++++++-----------------------
> 1 file changed, 45 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
> index 5590eac..c79d336 100644
> --- a/drivers/usb/host/xhci-pci.c
> +++ b/drivers/usb/host/xhci-pci.c
> @@ -180,51 +180,6 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
> "QUIRK: Resetting on resume");
> }
>
> -/*
> - * In some Intel xHCI controllers, in order to get D3 working,
> - * through a vendor specific SSIC CONFIG register at offset 0x883c,
> - * SSIC PORT need to be marked as "unused" before putting xHCI
> - * into D3. After D3 exit, the SSIC port need to be marked as "used".
> - * Without this change, xHCI might not enter D3 state.
> - * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
> - * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
> - */
> -static void xhci_pme_quirk(struct usb_hcd *hcd, bool suspend)
> -{
> - struct xhci_hcd *xhci = hcd_to_xhci(hcd);
> - struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
> - u32 val;
> - void __iomem *reg;
> -
> - if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
> - pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
> -
> - reg = (void __iomem *) xhci->cap_regs + PORT2_SSIC_CONFIG_REG2;
> -
> - /* Notify SSIC that SSIC profile programming is not done */
> - val = readl(reg) & ~PROG_DONE;
> - writel(val, reg);
> -
> - /* Mark SSIC port as unused(suspend) or used(resume) */
> - val = readl(reg);
> - if (suspend)
> - val |= SSIC_PORT_UNUSED;
> - else
> - val &= ~SSIC_PORT_UNUSED;
> - writel(val, reg);
> -
> - /* Notify SSIC that SSIC profile programming is done */
> - val = readl(reg) | PROG_DONE;
> - writel(val, reg);
> - readl(reg);
> - }
> -
> - reg = (void __iomem *) xhci->cap_regs + 0x80a4;
> - val = readl(reg);
> - writel(val | BIT(28), reg);
> - readl(reg);
> -}
> -
> #ifdef CONFIG_ACPI
> static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev)
> {
> @@ -345,6 +300,51 @@ static void xhci_pci_remove(struct pci_dev *dev)
> }
>
> #ifdef CONFIG_PM
> +/*
> + * In some Intel xHCI controllers, in order to get D3 working,
> + * through a vendor specific SSIC CONFIG register at offset 0x883c,
> + * SSIC PORT need to be marked as "unused" before putting xHCI
> + * into D3. After D3 exit, the SSIC port need to be marked as "used".
> + * Without this change, xHCI might not enter D3 state.
> + * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
> + * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
> + */
> +static void xhci_pme_quirk(struct usb_hcd *hcd, bool suspend)
> +{
> + struct xhci_hcd *xhci = hcd_to_xhci(hcd);
> + struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
> + u32 val;
> + void __iomem *reg;
> +
> + if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
> + pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
> +
> + reg = (void __iomem *) xhci->cap_regs + PORT2_SSIC_CONFIG_REG2;
> +
> + /* Notify SSIC that SSIC profile programming is not done */
> + val = readl(reg) & ~PROG_DONE;
> + writel(val, reg);
> +
> + /* Mark SSIC port as unused(suspend) or used(resume) */
> + val = readl(reg);
> + if (suspend)
> + val |= SSIC_PORT_UNUSED;
> + else
> + val &= ~SSIC_PORT_UNUSED;
> + writel(val, reg);
> +
> + /* Notify SSIC that SSIC profile programming is done */
> + val = readl(reg) | PROG_DONE;
> + writel(val, reg);
> + readl(reg);
> + }
> +
> + reg = (void __iomem *) xhci->cap_regs + 0x80a4;
> + val = readl(reg);
> + writel(val | BIT(28), reg);
> + readl(reg);
> +}
> +
> static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
> {
> struct xhci_hcd *xhci = hcd_to_xhci(hcd);
> --
> 2.4.3
>
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