Thanks all. When I debug,I find that if I build-in the xHCI, (suspend to disk)STD is perform OK. But whatever I build-in xHCI, (suspend to ram)STR is bad. My experiment is in MIPS paltform with Renesas Technology Corp. uPD720201 USB 3.0 Host Controller (rev 03), and I don't have the X86 experimental environment, Who can tell me, if the STS_SRE bit is set in X86 after S3 resume? It route the same way with MIPS? Aaron Chou On Tue, Aug 18, 2015 at 9:35 PM, Mathias Nyman <mathias.nyman@xxxxxxxxxxxxxxx> wrote: > On 17.08.2015 12:18, Aaron Zhou wrote: >> >> Hi, all >> >>> https://bugzilla.kernel.org/show_bug.cgi?id=102101 >>> >>> Bug ID: 102101 >>> Summary: USB 3 storage device disconnects after S3 resume,and >>> re-enumerate it. >> >> >> I debug this problem ,and I find that when I suspend to ram (STR), >> the STS_SRE bit is set. and re-initialize the HC during resume, >> >> In xhci_resume() function, after xhci_handshake() is called , >> I printk the xhci->op_regs->status, it is 0x401, means the STS_SRE bit is >> set. >> I can not understand..... >> >> This is normal ? >> > > Hi > > Save Restore Error (STS_SRE) doesn't seem normal. > Last time I saw it was when the driver didn't allocate enough scratchpad > memory where it should save the state while suspending > > It could be something messing with the memory where xhci state is saved, > or xhci being placed into run mode in between save and restore state. > > -Mathias > -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
