[PATCH 0/7] xhci fixes for 4.2 rc

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Hi Greg

These xhci fixes for 4.2-rc4 are mostly powermanagement related.
Fixing xhci SuperSpeed port resume state issues, and Intel Braswell xhci
specific D3 issues.

A couple other fixes correcting software TT bandwidth calculation, and a fix
for a "off by one" ring cache issue that caused NULL pointer dereference.

-Mathias

AMAN DEEP (1):
  usb: xhci: Bugfix for NULL pointer deference in xhci_endpoint_init()
    function

Brian Campbell (1):
  xhci: Calculate old endpoints correctly on device reset

Mathias Nyman (1):
  xhci: call BIOS workaround to enable runtime suspend on Intel Braswell

Rajmohan Mani (1):
  xhci: Workaround to get D3 working in Intel xHCI

Zhuang Jin Can (3):
  xhci: report U3 when link is in resume state
  xhci: prevent bus_suspend if SS port resuming in phase 1
  xhci: do not report PLC when link is in internal resume state

 drivers/usb/host/xhci-hub.c  | 22 ++++++++++++-----
 drivers/usb/host/xhci-mem.c  |  2 +-
 drivers/usb/host/xhci-pci.c  | 57 +++++++++++++++++++++++++++++++++++++++++---
 drivers/usb/host/xhci-ring.c |  3 +++
 drivers/usb/host/xhci.c      |  3 +++
 drivers/usb/host/xhci.h      |  1 +
 6 files changed, 78 insertions(+), 10 deletions(-)

-- 
1.8.3.2

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