RE: [PATCH 3/3] usb: chipidea: use hrtimer for otg fsm timers

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> > > > > @@ -579,8 +579,15 @@ int ci_otg_fsm_work(struct ci_hdrc *ci)
> > > > >  			 * a_idle to a_wait_vrise when power up
> > > > >  			 */
> > > > >  			if ((ci->fsm.id) || (ci->id_event) ||
> > > > > -						(ci->fsm.power_up))
> > > > > +						(ci->fsm.power_up)) {
> > > > >  				ci_otg_queue_work(ci);
> > > > > +			} else {
> > > > > +				/* Enable data pulse irq */
> > > > > +				hw_write(ci, OP_PORTSC,
> PORTSC_W1C_BITS |
> > > > > +
> 	PORTSC_PP, 0);
> > > > > +				hw_write_otgsc(ci, OTGSC_DPIS,
> OTGSC_DPIS);
> > > > > +				hw_write_otgsc(ci, OTGSC_DPIE,
> OTGSC_DPIE);
> > > > > +			}
> > > >
> > > > Can we enable data pulse enable at initialization routine?
> > >
> > > This irq should be enabled only for A-device when there is no
> > > session (host role, no vbus, so in A_IDLE state), and disable it after receive
> its irq(SRP).
> > >
> >
> > But from the code, I don't know the state is at A_IDLE, mind to change?
> >
> 
> It's already under condition of A_IDLE as below:
> 
> if (ci->fsm.otg->state == OTG_STATE_A_IDLE) {
> 	... ...
> 	if () {
> 		... ...
> 	} else {
> 		/* Enable data pulse irq */
> 		...
> 	}
> }
> 
> That's a change to avoid to do it in timer out(VFALL) handler, so put it here
> (after otg fsm transit to A_IDLE and will no further state transitions).
> 

Oh, I have no seen it in patch file. Send your v2, then, I can have a test.

Peter
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