Hi all,
While working on our test board with Exynos7 SoC, we see that across
suspend/resume (Suspend to RAM) the EHCI can't resume the devices connected
to HSIC phy properly.
We have been using 3.16 kernel for our development, but on the ehci-exynos
driver
side there isn't any delta that we have added, and the driver is pretty much
in same shape
as in 3.19
We have a HSIC hub connected to the HSIC phy interface on the controller
which gets enumerated during boot up, and the devices connected across this
hub also get enumerated completely.
But once we suspend the system, after resume the hub gets disconnected from
the bus and we see **bad dma** error from dma_pool_free for ehci_qtd.
Below is a short log of the resume.
--------------------------------------------------------------------------
[ 11.231907] Resume caused by wakeup_stat 0x80000001
[ 11.232926] PM: noirq resume of devices complete after 0.949 msecs
[ 11.239387] PM: early resume of devices complete after 1.[ 11.244699]
..
..
[ 11.262665] usb usb1: root hub lost power or was reset
[ 11.324501] usb usb2: root hub lost power or was reset
[ 11.328747] wake disabled for irq 5
[ 11.337449] usb usb3: root hub lost power or was reset
[ 11.342472] usb usb4: root hub lost power or was reset
[ 11.360866] wake disabled for irq 6
[ 11.540541] PM: resume of devices complete after 296.332 msecs
[ 11.545645] Restarting tasks ...
[ 11.549009] usb 1-2: USB disconnect, device number 2
[ 11.554208] done.
[ 11.555727] exynos-ehci 15510000.usb: dma_pool_free ehci_qtd,
ffffff8000125120/b900002212876c62 (bad dma)
[ 11.564906] exynos-ehci 15510000.usb: dma_pool_free ehci_qtd,
ffffff8000125060/f2a20ae152806402 (bad dma)
--------------------------------------------------------------------------
The only difference between the controller's register dumps *before suspend*
and *after resume*
is:
Before suspend
------------------
USBCMD : 0x00010015
USBSTS: 0x00004008
After Resume
----------------
USBCMD : 0x00010005
USBSTS: 0x00000008
so, we see the PeriodicScheduleEnable gets disabled, and the same is
reflected from USBSTS register.
The HCCAP registers are:
HCCPBASE: 0x01000010
HCSPARAMS: 0x00001212
HCCPARAMS: 0x0000A026
Any pointers for debugging this would be very much appreciated.
Best Regards
Vivek
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