Hi Kishon,
On 03/03/2014 01:38 PM, Kishon Vijay Abraham I wrote:
> Adapted dwc3 core to use the Generic PHY Framework. So for init, exit,
> power_on and power_off the following APIs are used phy_init(), phy_exit(),
> phy_power_on() and phy_power_off().
>
> However using the old USB phy library wont be removed till the PHYs of all
> other SoC's using dwc3 core is adapted to the Generic PHY Framework.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@xxxxxx>
> ---
> Documentation/devicetree/bindings/usb/dwc3.txt | 6 +-
> drivers/usb/dwc3/core.c | 86 +++++++++++++++++++++---
> drivers/usb/dwc3/core.h | 7 ++
> 3 files changed, 89 insertions(+), 10 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
> index e807635..471366d 100644
> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> @@ -6,11 +6,13 @@ Required properties:
> - compatible: must be "snps,dwc3"
> - reg : Address and length of the register set for the device
> - interrupts: Interrupts used by the dwc3 controller.
> +
> +Optional properties:
> - usb-phy : array of phandle for the PHY device. The first element
> in the array is expected to be a handle to the USB2/HS PHY and
> the second element is expected to be a handle to the USB3/SS PHY
> -
> -Optional properties:
> + - phys: from the *Generic PHY* bindings
> + - phy-names: from the *Generic PHY* bindings
> - tx-fifo-resize: determines if the FIFO *has* to be reallocated.
>
> This is usually a subnode to DWC3 glue to which it is connected.
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 225a4d6..497234a 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -61,9 +61,10 @@ void dwc3_set_mode(struct dwc3 *dwc, u32 mode)
> * dwc3_core_soft_reset - Issues core soft reset and PHY reset
> * @dwc: pointer to our context structure
> */
> -static void dwc3_core_soft_reset(struct dwc3 *dwc)
> +static int dwc3_core_soft_reset(struct dwc3 *dwc)
> {
> u32 reg;
> + int ret;
>
> /* Before Resetting PHY, put Core in Reset */
> reg = dwc3_readl(dwc->regs, DWC3_GCTL);
> @@ -82,6 +83,15 @@ static void dwc3_core_soft_reset(struct dwc3 *dwc)
>
> usb_phy_init(dwc->usb2_phy);
> usb_phy_init(dwc->usb3_phy);
> + ret = phy_init(dwc->usb2_generic_phy);
you need to check if dwc->usb?_generic_phy is not NULL before using any of the PHY APIs
throughout this patch.
> + if (ret < 0)
> + return ret;
> +
> + ret = phy_init(dwc->usb3_generic_phy);
> + if (ret < 0) {
> + phy_exit(dwc->usb2_generic_phy);
> + return ret;
> + }
> mdelay(100);
>
> /* Clear USB3 PHY reset */
> @@ -100,6 +110,8 @@ static void dwc3_core_soft_reset(struct dwc3 *dwc)
> reg = dwc3_readl(dwc->regs, DWC3_GCTL);
> reg &= ~DWC3_GCTL_CORESOFTRESET;
> dwc3_writel(dwc->regs, DWC3_GCTL, reg);
> +
> + return 0;
> }
>
cheers,
-roger
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