> -----Original Message----- > From: Peter Chen [mailto:peter.chen@xxxxxxxxxxxxx] > Sent: 2014年2月25日 12:19 > To: Neil Zhang > Cc: balbi@xxxxxx; gregkh@xxxxxxxxxxxxxxxxxxx; linux-usb@xxxxxxxxxxxxxxx; > linux-kernel@xxxxxxxxxxxxxxx > Subject: Re: [PATCH 5/6] USB: gadget: mv_udc: workaroud for missing dTD > > On Mon, Feb 24, 2014 at 04:03:15PM +0800, Neil Zhang wrote: > > There is an issue with the add dTD tripwire semaphore (ATDTW bit in > > USBCMD register) that can cause the controller to ignore a dTD that is > > added to a primed endpoint. When this happens, the software can read > > the tripwire bit and the status bit at '1' even though the endpoint is > > unprimed. > > > > After executing a dTD, the device controller endpoint state machine > > executes a final read of the dTD terminate bit to check if the > > application added a dTD to the linked list at the last moment. This > > read is done in the finpkt_read_latest_next_td (44) state. After the > > read is performed, if the terminate bit is still set, the state > > machine moves to unprime the endpoint. The decision to unprime the > > endpoint is done in the checkqh_decision (59) state, based on the value of > the terminate bit. > > > > Before reaching the checkqh_decision state, the state machine > > traverses the writeqhtd_status (57), writeqh_status (56), and > > release_prime_mask > > (42) states. As shown in the waveform, the ep_addtd_tripwire_clr > > signal is not set to clear the tripwire bit in these states. > > > > Signed-off-by: Neil Zhang <zhangwm@xxxxxxxxxxx> > > --- > > drivers/usb/gadget/mv_udc_core.c | 20 ++++++++++++++++++++ > > 1 file changed, 20 insertions(+) > > > > diff --git a/drivers/usb/gadget/mv_udc_core.c > > b/drivers/usb/gadget/mv_udc_core.c > > index a620cff..8df8606 100644 > > --- a/drivers/usb/gadget/mv_udc_core.c > > +++ b/drivers/usb/gadget/mv_udc_core.c > > @@ -196,7 +196,27 @@ static int process_ep_req(struct mv_udc *udc, int > index, > > while (readl(&udc->op_regs->epstatus) & bit_pos) > > udelay(1); > > break; > > + } else { > > + if (!(readl(&udc->op_regs->epstatus) & bit_pos)) { > > + /* The DMA engine thinks there is no more dTD */ > > + curr_dqh->next_dtd_ptr = curr_dtd->dtd_next > > + & EP_QUEUE_HEAD_NEXT_POINTER_MASK; > > + > > + /* clear active and halt bit */ > > + curr_dqh->size_ioc_int_sts &= > > + ~(DTD_STATUS_ACTIVE > > + | DTD_STATUS_HALTED); > > + > > + /* Do prime again */ > > + wmb(); > > + writel(bit_pos, &udc->op_regs->epprime); > > + while (readl(&udc->op_regs->epprime) & bit_pos) > > + cpu_relax(); > > + > > + break; > > + } > > } > > + > > udelay(1); > > } > > > > Is it a chipidea IP issue? Any errate number for this issue? > Does we need it for chipidea driver? > Yes, I think so. 9000531823 B2-Medium Adding a dTD to a Primed Endpoint May Not Get Recognized Impacted Configuration: All device mode configurations. > -- > > Best Regards, > Peter Chen Best Regards, Neil Zhang ?韬{.n?????%??檩??w?{.n???{炳???骅w* jg????????G??⒏ ⒎?:+v???????? ????＂??????
