The following commit has been merged into the perf/core branch of tip:
Commit-ID: e1e7844ced88f9558a48579390a7d4eaac6a28eb
Gitweb: https://git.kernel.org/tip/e1e7844ced88f9558a48579390a7d4eaac6a28eb
Author: Ravi Bangoria <ravi.bangoria@xxxxxxx>
AuthorDate: Wed, 15 Jan 2025 05:44:34
Committer: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
CommitterDate: Mon, 03 Feb 2025 11:46:05 +01:00
perf/amd/ibs: Don't allow freq mode event creation through ->config interface
Most perf_event_attr->config bits directly maps to IBS_{FETCH|OP}_CTL
MSR. Since the sample period is programmed in these control registers,
IBS PMU driver allows opening an IBS event by setting sample period
value directly in perf_event_attr->config instead of using explicit
perf_event_attr->sample_period interface.
However, this logic is not applicable for freq mode events since the
semantics of control register fields are applicable only to fixed
sample period whereas the freq mode event adjusts sample period after
each and every sample. Currently, IBS driver (unintentionally) allows
creating freq mode event via ->config interface, which is semantically
wrong as well as detrimental because it can be misused to bypass
perf_event_max_sample_rate checks.
Don't allow freq mode event creation through perf_event_attr->config
interface.
Signed-off-by: Ravi Bangoria <ravi.bangoria@xxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Acked-by: Namhyung Kim <namhyung@xxxxxxxxxx>
Link: https://lkml.kernel.org/r/20250115054438.1021-6-ravi.bangoria@xxxxxxx
---
arch/x86/events/amd/ibs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index d9c84f1..3e7ca1e 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -315,6 +315,9 @@ static int perf_ibs_init(struct perf_event *event)
} else {
u64 period = 0;
+ if (event->attr.freq)
+ return -EINVAL;
+
if (perf_ibs == &perf_ibs_op) {
period = (config & IBS_OP_MAX_CNT) << 4;
if (ibs_caps & IBS_CAPS_OPCNTEXT)
|