The following commit has been merged into the perf/core branch of tip: Commit-ID: 4e54ed496343702837ddca5f5af720161c6a5407 Gitweb: https://git.kernel.org/tip/4e54ed496343702837ddca5f5af720161c6a5407 Author: Kan Liang <kan.liang@xxxxxxxxxxxxxxx> AuthorDate: Thu, 21 Nov 2024 10:05:26 -08:00 Committer: Peter Zijlstra <peterz@xxxxxxxxxxxxx> CommitterDate: Mon, 02 Dec 2024 12:01:33 +01:00 perf/x86/intel: Add Arrow Lake U support >From PMU's perspective, the new Arrow Lake U is the same as the Meteor Lake. Signed-off-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx> Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx> Link: https://lkml.kernel.org/r/20241121180526.2364759-1-kan.liang@xxxxxxxxxxxxxxx --- arch/x86/events/intel/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index bb284af..2e1e268 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -7135,6 +7135,7 @@ __init int intel_pmu_init(void) case INTEL_METEORLAKE: case INTEL_METEORLAKE_L: + case INTEL_ARROWLAKE_U: intel_pmu_init_hybrid(hybrid_big_small); x86_pmu.pebs_latency_data = cmt_latency_data;
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