[tip: irq/core] arm64: dts: st: Add interrupt parent to pinctrl on stm32mp251

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The following commit has been merged into the irq/core branch of tip:

Commit-ID:     7da4ba315e3980ca3e87d40a10908f716f026d2c
Gitweb:        https://git.kernel.org/tip/7da4ba315e3980ca3e87d40a10908f716f026d2c
Author:        Antonio Borneo <antonio.borneo@xxxxxxxxxxx>
AuthorDate:    Mon, 15 Apr 2024 15:49:26 +02:00
Committer:     Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CommitterDate: Tue, 23 Apr 2024 00:28:16 +02:00

arm64: dts: st: Add interrupt parent to pinctrl on stm32mp251

Add exti1 as interrupt parent for the two pin controllers.  Add the
additional required property st,syscfg.

Signed-off-by: Antonio Borneo <antonio.borneo@xxxxxxxxxxx>
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20240415134926.1254428-12-antonio.borneo@xxxxxxxxxxx

---
 arch/arm64/boot/dts/st/stm32mp251.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 1426446..e7d1614 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -271,6 +271,8 @@
 			#size-cells = <1>;
 			compatible = "st,stm32mp257-pinctrl";
 			ranges = <0 0x44240000 0xa0400>;
+			interrupt-parent = <&exti1>;
+			st,syscfg = <&exti1 0x60 0xff>;
 			pins-are-numbered;
 
 			gpioa: gpio@44240000 {
@@ -400,6 +402,8 @@
 			#size-cells = <1>;
 			compatible = "st,stm32mp257-z-pinctrl";
 			ranges = <0 0x46200000 0x400>;
+			interrupt-parent = <&exti1>;
+			st,syscfg = <&exti1 0x60 0xff>;
 			pins-are-numbered;
 
 			gpioz: gpio@46200000 {




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