On April 17, 2024 9:21:29 PM GMT+02:00, Uros Bizjak <ubizjak@xxxxxxxxx> wrote: >The above is perhaps a little unfortunate example taken from > >if (cmpxchg64(...)) > >where the check is against zero. The compiler can optimize the check >to a TEST insn in this particular case, but otherwise CMP will be >emitted for different usages. Not a big difference, but a register has >to be kept live across cmpxchg8b. > ... > >There is one important issue. When a register (or two for double-word >values) has to be kept live for a compare, the register pressure on >32bit targets around cmpxchg8b goes through the roof, and when using >the frame pointer (and maybe some fixed register, e.g. PIC), the >register allocator runs out of available registers. The number of >spills around cmpxchg8b signals the troubles register allocator goes >through to "fix" everything, so from the compiler PoV any relief is >more than welcome here. Even in GCC internal libraries, we have had to >take a special approach with this insn to avoid internal compiler >errors. The kernel was quite lucky here ;) That would've been a lot better reason to justify the change. I think you should put those things in the commit messages. Thx. -- Sent from a small device: formatting sucks and brevity is inevitable.
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