[tip: x86/mtrr] x86/mtrr: Allocate mtrr_value array dynamically

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The following commit has been merged into the x86/mtrr branch of tip:

Commit-ID:     961c6a4326643e6588352b7f1f5d77364415386f
Gitweb:        https://git.kernel.org/tip/961c6a4326643e6588352b7f1f5d77364415386f
Author:        Juergen Gross <jgross@xxxxxxxx>
AuthorDate:    Tue, 02 May 2023 14:09:24 +02:00
Committer:     Borislav Petkov (AMD) <bp@xxxxxxxxx>
CommitterDate: Thu, 01 Jun 2023 15:04:33 +02:00

x86/mtrr: Allocate mtrr_value array dynamically

The mtrr_value[] array is a static variable which is used only in a few
configurations. Consuming 6kB is ridiculous for this case, especially as
the array doesn't need to be that large and it can easily be allocated
dynamically.

Signed-off-by: Juergen Gross <jgross@xxxxxxxx>
Signed-off-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>
Tested-by: Michael Kelley <mikelley@xxxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20230502120931.20719-10-jgross@xxxxxxxx
Signed-off-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>
---
 arch/x86/kernel/cpu/mtrr/legacy.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/mtrr/legacy.c b/arch/x86/kernel/cpu/mtrr/legacy.c
index 7d379fb..d25882f 100644
--- a/arch/x86/kernel/cpu/mtrr/legacy.c
+++ b/arch/x86/kernel/cpu/mtrr/legacy.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-only
 
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/syscore_ops.h>
 #include <asm/cpufeature.h>
 #include <asm/mtrr.h>
@@ -38,12 +39,15 @@ struct mtrr_value {
 	unsigned long	lsize;
 };
 
-static struct mtrr_value mtrr_value[MTRR_MAX_VAR_RANGES];
+static struct mtrr_value *mtrr_value;
 
 static int mtrr_save(void)
 {
 	int i;
 
+	if (!mtrr_value)
+		return -ENOMEM;
+
 	for (i = 0; i < num_var_ranges; i++) {
 		mtrr_if->get(i, &mtrr_value[i].lbase,
 				&mtrr_value[i].lsize,
@@ -72,6 +76,8 @@ static struct syscore_ops mtrr_syscore_ops = {
 
 void mtrr_register_syscore(void)
 {
+	mtrr_value = kcalloc(num_var_ranges, sizeof(*mtrr_value), GFP_KERNEL);
+
 	/*
 	 * The CPU has no MTRR and seems to not support SMP. They have
 	 * specific drivers, we use a tricky method to support



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