On Thu, Jun 01, 2023 at 01:56:43PM +0200, Peter Zijlstra wrote: > On Thu, Jun 01, 2023 at 01:13:26PM +0200, Peter Zijlstra wrote: > > > > This DeathStarBench thing seems to suggest that scanning up to 4 CCDs > > isn't too much of a bother; so perhaps something like so? > > > > (on top of tip/sched/core from just a few hours ago, as I had to 'fix' > > this patch and force pushed the thing) > > > > And yeah, random hacks and heuristics here :/ Does there happen to be > > additional topology that could aid us here? Does the CCD fabric itself > > have a distance metric we can use? > > https://www.anandtech.com/show/16529/amd-epyc-milan-review/4 > > Specifically: > > https://images.anandtech.com/doci/16529/Bounce-7763.png > > That seems to suggest there are some very minor distance effects in the > CCD fabric. I didn't read the article too closely, but you'll note that > the first 4 CCDs have inter-CCD latency < 100 while the rest has > 100. > > Could you also test on a Zen2 Epyc, does that require nr=8 instead of 4? > Should we perhaps write it like: 32 / llc_size ? > > The Zen2 picture: > > https://images.anandtech.com/doci/16315/Bounce-7742.png > > Shows a more pronounced CCD fabric topology, you can really see the 2 > CCX inside the CCD but also there's two ligher green squares around the > CCDs themselves. I can't seem to find pretty pictures for Zen4 Epyc; what does that want? That's even bigger at 96/8=12 LLCs afaict.
|