The following commit has been merged into the x86/cpu branch of tip: Commit-ID: 3f2adf00f52b5f2e9e9f23bb5c77608fc9ee297c Gitweb: https://git.kernel.org/tip/3f2adf00f52b5f2e9e9f23bb5c77608fc9ee297c Author: Paolo Bonzini <pbonzini@xxxxxxxxxx> AuthorDate: Tue, 19 Jul 2022 13:47:14 -04:00 Committer: Borislav Petkov <bp@xxxxxxx> CommitterDate: Tue, 19 Jul 2022 20:53:10 +02:00 x86/cpu: Use MSR_IA32_MISC_ENABLE constants Instead of the magic numbers 1<<11 and 1<<12 use the constants from msr-index.h. This makes it obvious where those bits of MSR_IA32_MISC_ENABLE are consumed (and in fact that Linux consumes them at all) to simple minds that grep for MSR_IA32_MISC_ENABLE_.*_UNAVAIL. Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx> Signed-off-by: Borislav Petkov <bp@xxxxxxx> Link: https://lore.kernel.org/r/20220719174714.2410374-1-pbonzini@xxxxxxxxxx --- arch/x86/kernel/cpu/intel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 8321c43..a00dd3e 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -647,9 +647,9 @@ static void init_intel(struct cpuinfo_x86 *c) unsigned int l1, l2; rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); - if (!(l1 & (1<<11))) + if (!(l1 & MSR_IA32_MISC_ENABLE_BTS_UNAVAIL)) set_cpu_cap(c, X86_FEATURE_BTS); - if (!(l1 & (1<<12))) + if (!(l1 & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL)) set_cpu_cap(c, X86_FEATURE_PEBS); }
|