The following commit has been merged into the x86/urgent branch of tip: Commit-ID: 3ccce9340326df40ba4462d4d2a1692b6387a68e Gitweb: https://git.kernel.org/tip/3ccce9340326df40ba4462d4d2a1692b6387a68e Author: Tony Luck <tony.luck@xxxxxxxxx> AuthorDate: Mon, 11 Apr 2022 16:37:03 -07:00 Committer: Borislav Petkov <bp@xxxxxxx> CommitterDate: Tue, 19 Apr 2022 12:04:51 +02:00 x86/cpu: Add new Alderlake and Raptorlake CPU model numbers Intel is subdividing the mobile segment with additional models with the same codename. Using the Intel "N" and "P" suffices for these will be less confusing than trying to map to some different naming convention. Signed-off-by: Tony Luck <tony.luck@xxxxxxxxx> Signed-off-by: Borislav Petkov <bp@xxxxxxx> Acked-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx> Link: https://lore.kernel.org/r/YlS7n7Xtso9BXZA2@xxxxxxxxxxxxxxxxxxxxxxxxx --- arch/x86/include/asm/intel-family.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h index 048b6d5..def6ca1 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -26,6 +26,7 @@ * _G - parts with extra graphics on * _X - regular server parts * _D - micro server parts + * _N,_P - other mobile parts * * Historical OPTDIFFs: * @@ -107,8 +108,10 @@ #define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */ #define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */ +#define INTEL_FAM6_ALDERLAKE_N 0xBE #define INTEL_FAM6_RAPTORLAKE 0xB7 +#define INTEL_FAM6_RAPTORLAKE_P 0xBA /* "Small Core" Processors (Atom) */
|