The following commit has been merged into the ras/core branch of tip: Commit-ID: 1e56279a49168f24b2b58e843ae92976f90a98a6 Gitweb: https://git.kernel.org/tip/1e56279a49168f24b2b58e843ae92976f90a98a6 Author: Smita Koralahalli <Smita.KoralahalliChannabasappa@xxxxxxx> AuthorDate: Thu, 04 Nov 2021 16:58:42 -05:00 Committer: Borislav Petkov <bp@xxxxxxx> CommitterDate: Wed, 08 Dec 2021 12:01:01 +01:00 x86/mce/inject: Set the valid bit in MCA_STATUS before error injection MCA handlers check the valid bit in each status register (MCA_STATUS[Val]) and continue processing the error only if the valid bit is set. Set the valid bit unconditionally in the corresponding MCA_STATUS register and correct any Val=0 injections made by the user as such errors will get ignored and such injections will be largely pointless. Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@xxxxxxx> Signed-off-by: Borislav Petkov <bp@xxxxxxx> Link: https://lore.kernel.org/r/20211104215846.254012-3-Smita.KoralahalliChannabasappa@xxxxxxx --- arch/x86/kernel/cpu/mce/inject.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inject.c index 725e8e4..6eac840 100644 --- a/arch/x86/kernel/cpu/mce/inject.c +++ b/arch/x86/kernel/cpu/mce/inject.c @@ -503,6 +503,8 @@ static void do_inject(void) i_mce.tsc = rdtsc_ordered(); + i_mce.status |= MCI_STATUS_VAL; + if (i_mce.misc) i_mce.status |= MCI_STATUS_MISCV;
|