The following commit has been merged into the objtool/core branch of tip: Commit-ID: a92ede2d584a2e070def59c7e47e6b6f6341c55c Gitweb: https://git.kernel.org/tip/a92ede2d584a2e070def59c7e47e6b6f6341c55c Author: Peter Zijlstra <peterz@xxxxxxxxxxxxx> AuthorDate: Tue, 26 Oct 2021 14:01:38 +02:00 Committer: Peter Zijlstra <peterz@xxxxxxxxxxxxx> CommitterDate: Thu, 28 Oct 2021 23:25:26 +02:00 x86/asm: Fix register order Ensure the register order is correct; this allows for easy translation between register number and trampoline and vice-versa. Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx> Reviewed-by: Borislav Petkov <bp@xxxxxxx> Acked-by: Josh Poimboeuf <jpoimboe@xxxxxxxxxx> Tested-by: Alexei Starovoitov <ast@xxxxxxxxxx> Link: https://lore.kernel.org/r/20211026120309.978573921@xxxxxxxxxxxxx --- arch/x86/include/asm/GEN-for-each-reg.h | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/GEN-for-each-reg.h b/arch/x86/include/asm/GEN-for-each-reg.h index 1b07fb1..0794910 100644 --- a/arch/x86/include/asm/GEN-for-each-reg.h +++ b/arch/x86/include/asm/GEN-for-each-reg.h @@ -1,11 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * These are in machine order; things rely on that. + */ #ifdef CONFIG_64BIT GEN(rax) -GEN(rbx) GEN(rcx) GEN(rdx) +GEN(rbx) +GEN(rsp) +GEN(rbp) GEN(rsi) GEN(rdi) -GEN(rbp) GEN(r8) GEN(r9) GEN(r10) @@ -16,10 +21,11 @@ GEN(r14) GEN(r15) #else GEN(eax) -GEN(ebx) GEN(ecx) GEN(edx) +GEN(ebx) +GEN(esp) +GEN(ebp) GEN(esi) GEN(edi) -GEN(ebp) #endif
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