The following commit has been merged into the perf/urgent branch of tip: Commit-ID: 71920ea97d6d1d800ee8b51951dc3fda3f5dc698 Gitweb: https://git.kernel.org/tip/71920ea97d6d1d800ee8b51951dc3fda3f5dc698 Author: Kan Liang <kan.liang@xxxxxxxxxxxxxxx> AuthorDate: Wed, 06 Oct 2021 13:12:17 -07:00 Committer: Peter Zijlstra <peterz@xxxxxxxxxxxxx> CommitterDate: Fri, 15 Oct 2021 11:25:26 +02:00 perf/x86/msr: Add Sapphire Rapids CPU support SMI_COUNT MSR is supported on Sapphire Rapids CPU. Signed-off-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx> Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx> Link: https://lkml.kernel.org/r/1633551137-192083-1-git-send-email-kan.liang@xxxxxxxxxxxxxxx --- arch/x86/events/msr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c index c853b28..96c775a 100644 --- a/arch/x86/events/msr.c +++ b/arch/x86/events/msr.c @@ -68,6 +68,7 @@ static bool test_intel(int idx, void *data) case INTEL_FAM6_BROADWELL_D: case INTEL_FAM6_BROADWELL_G: case INTEL_FAM6_BROADWELL_X: + case INTEL_FAM6_SAPPHIRERAPIDS_X: case INTEL_FAM6_ATOM_SILVERMONT: case INTEL_FAM6_ATOM_SILVERMONT_D:
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