The following commit has been merged into the x86/irq branch of tip: Commit-ID: 283fa3b6483a84aeb62f1b97c2ec7c02eb2f5882 Gitweb: https://git.kernel.org/tip/283fa3b6483a84aeb62f1b97c2ec7c02eb2f5882 Author: H. Peter Anvin (Intel) <hpa@xxxxxxxxx> AuthorDate: Wed, 19 May 2021 14:21:51 -07:00 Committer: Thomas Gleixner <tglx@xxxxxxxxxxxxx> CommitterDate: Fri, 21 May 2021 12:36:45 +02:00 x86: Add native_[ig]dt_invalidate() In some places, the native forms of descriptor table invalidation is required. Rather than open-coding them, add explicitly native functions to invalidate the GDT and IDT. Signed-off-by: H. Peter Anvin (Intel) <hpa@xxxxxxxxx> Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx> Link: https://lore.kernel.org/r/20210519212154.511983-6-hpa@xxxxxxxxx --- arch/x86/include/asm/desc.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h index b8429ae..400c178 100644 --- a/arch/x86/include/asm/desc.h +++ b/arch/x86/include/asm/desc.h @@ -224,6 +224,26 @@ static inline void store_idt(struct desc_ptr *dtr) asm volatile("sidt %0":"=m" (*dtr)); } +static inline void native_gdt_invalidate(void) +{ + const struct desc_ptr invalid_gdt = { + .address = 0, + .size = 0 + }; + + native_load_gdt(&invalid_gdt); +} + +static inline void native_idt_invalidate(void) +{ + const struct desc_ptr invalid_idt = { + .address = 0, + .size = 0 + }; + + native_load_idt(&invalid_idt); +} + /* * The LTR instruction marks the TSS GDT entry as busy. On 64-bit, the GDT is * a read-only remapping. To prevent a page fault, the GDT is switched to the
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