The following commit has been merged into the x86/cleanups branch of tip: Commit-ID: 1bc67873d401e6c2e6e30be7fef21337db07a042 Gitweb: https://git.kernel.org/tip/1bc67873d401e6c2e6e30be7fef21337db07a042 Author: Borislav Petkov <bp@xxxxxxx> AuthorDate: Wed, 12 May 2021 11:33:10 +02:00 Committer: Ingo Molnar <mingo@xxxxxxxxxx> CommitterDate: Wed, 12 May 2021 12:22:57 +02:00 x86/asm: Simplify __smp_mb() definition Drop the bitness ifdeffery in favor of using _ASM_SP, which is the helper macro for the rSP register specification for 32 and 64 bit depending on the build. No functional changes. Signed-off-by: Borislav Petkov <bp@xxxxxxx> Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx> Acked-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx> Link: https://lore.kernel.org/r/20210512093310.5635-1-bp@xxxxxxxxx --- arch/x86/include/asm/barrier.h | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h index 4819d5e..3ba772a 100644 --- a/arch/x86/include/asm/barrier.h +++ b/arch/x86/include/asm/barrier.h @@ -54,11 +54,8 @@ static inline unsigned long array_index_mask_nospec(unsigned long index, #define dma_rmb() barrier() #define dma_wmb() barrier() -#ifdef CONFIG_X86_32 -#define __smp_mb() asm volatile("lock; addl $0,-4(%%esp)" ::: "memory", "cc") -#else -#define __smp_mb() asm volatile("lock; addl $0,-4(%%rsp)" ::: "memory", "cc") -#endif +#define __smp_mb() asm volatile("lock; addl $0,-4(%%" _ASM_SP ")" ::: "memory", "cc") + #define __smp_rmb() dma_rmb() #define __smp_wmb() barrier() #define __smp_store_mb(var, value) do { (void)xchg(&var, value); } while (0)
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