The following commit has been merged into the ras/core branch of tip:
Commit-ID: 098416e6986127f7e4c8ce4fd6bbbd80e55b0386
Gitweb: https://git.kernel.org/tip/098416e6986127f7e4c8ce4fd6bbbd80e55b0386
Author: Tony Luck <tony.luck@xxxxxxxxx>
AuthorDate: Tue, 10 Nov 2020 16:39:54 -08:00
Committer: Borislav Petkov <bp@xxxxxxx>
CommitterDate: Mon, 16 Nov 2020 17:34:08 +01:00
x86/mce: Use "safe" MSR functions when enabling additional error logging
Booting as a guest under KVM results in error messages about
unchecked MSR access:
unchecked MSR access error: RDMSR from 0x17f at rIP: 0xffffffff84483f16 (mce_intel_feature_init+0x156/0x270)
because KVM doesn't provide emulation for random model specific
registers.
Switch to using rdmsrl_safe()/wrmsrl_safe() to avoid the message.
Fixes: 68299a42f842 ("x86/mce: Enable additional error logging on certain Intel CPUs")
Reported-by: Qian Cai <cai@xxxxxxxxxx>
Signed-off-by: Tony Luck <tony.luck@xxxxxxxxx>
Signed-off-by: Borislav Petkov <bp@xxxxxxx>
Link: https://lkml.kernel.org/r/20201111003954.GA11878@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
---
arch/x86/kernel/cpu/mce/intel.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c
index b47883e..c2476fe 100644
--- a/arch/x86/kernel/cpu/mce/intel.c
+++ b/arch/x86/kernel/cpu/mce/intel.c
@@ -521,9 +521,10 @@ static void intel_imc_init(struct cpuinfo_x86 *c)
case INTEL_FAM6_SANDYBRIDGE_X:
case INTEL_FAM6_IVYBRIDGE_X:
case INTEL_FAM6_HASWELL_X:
- rdmsrl(MSR_ERROR_CONTROL, error_control);
+ if (rdmsrl_safe(MSR_ERROR_CONTROL, &error_control))
+ return;
error_control |= 2;
- wrmsrl(MSR_ERROR_CONTROL, error_control);
+ wrmsrl_safe(MSR_ERROR_CONTROL, error_control);
break;
}
}
|